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參數(shù)資料
| 型號(hào)： | 935269343557 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP160 |
| 封裝： | 28 X 28 MM, 3.40 MM HEIGHT, ROHS COMPLIANT, PLASTIC, SOT322-2, MS-022, QFP-160 |
| 文件頁(yè)數(shù)： | 100/143頁(yè) |
| 文件大?。?/td> | 696K |
| 代理商： | 935269343557 |
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2004 Aug 25
6
Philips Semiconductors
Product specication
Multimedia bridge, high performance
Scaler and PCI circuit (SPCI)
SAA7146A
6
PINNING
SYMBOL
PIN
STATUS
DESCRIPTION
D1_A0
1
I/O
bidirectional digital CCIR 656 D1 port A bit 0
D1_A1
2
I/O
bidirectional digital CCIR 656 D1 port A bit 1
D1_A2
3
I/O
bidirectional digital CCIR 656 D1 port A bit 2
D1_A3
4
I/O
bidirectional digital CCIR 656 D1 port A bit 3
VDDD1
5
P
digital supply voltage 1 (3.3 V)
VSSD1
6
P
digital ground 1
D1_A4
7
I/O
bidirectional digital CCIR 656 D1 port A bit 4
D1_A5
8
I/O
bidirectional digital CCIR 656 D1 port A bit 5
D1_A6
9
I/O
bidirectional digital CCIR 656 D1 port A bit 6
D1_A7
10
I/O
bidirectional digital CCIR 656 D1 port A bit 7
VS_A
11
I/O
bidirectional vertical sync signal port A
HS_A
12
I/O
bidirectional horizontal sync signal port A
LLC_A
13
I/O
bidirectional line-locked system clock port A
PXQ_A
14
I/O
bidirectional pixel qualier signal to mark valid pixels port A; note 1
VDDD2
15
P
digital supply voltage 2 (3.3 V)
VSSD2
16
P
digital ground 2
TRST_N
17
I
test reset input (JTAG pin must be set LOW for normal operation)
TMS
18
I
test mode select input (JTAG pin must be oating or set to HIGH during normal
operation)
TCLK
19
I
test clock input (JTAG pin should be set LOW during normal operation)
TDO
20
O
test data output (JTAG pin not active during normal operation)
TDI
21
I
test data input (JTAG pin must be oating or set to HIGH during normal operation)
VDDD3
22
P
digital supply voltage 3 (3.3 V)
VSSD3
23
P
digital ground 3
INTA#
24
O
PCI interrupt line output (active LOW)
RST#
25
I
PCI global reset input (active LOW)
CLK
26
I
PCI clock input
GNT#
27
I
bus grant input signal, PCI arbitration signal (active LOW)
REQ#
28
O
bus request output signal, PCI arbitration signal (active LOW)
VDDD4
29
P
digital supply voltage 4 (3.3 V)
VSSD4
30
P
digital ground 4
AD_PCI31
31
I/O
bidirectional PCI multiplexed address/data bit 31
AD_PCI30
32
I/O
bidirectional PCI multiplexed address/data bit 30
AD_PCI29
33
I/O
bidirectional PCI multiplexed address/data bit 29
AD_PCI28
34
I/O
bidirectional PCI multiplexed address/data bit 28
VDDD5
35
P
digital supply voltage 5 (3.3 V)
VSSD5
36
P
digital ground 5
AD_PCI27
37
I/O
bidirectional PCI multiplexed address/data bit 27
AD_PCI26
38
I/O
bidirectional PCI multiplexed address/data bit 26
AD_PCI25
39
I/O
bidirectional PCI multiplexed address/data bit 25
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PDF描述 |
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| 935269481115 | 0.3 A SWITCHING REGULATOR, 57.5 kHz SWITCHING FREQ-MAX, PDSO5 |
| 935269480115 | 0.3 A SWITCHING REGULATOR, 57.5 kHz SWITCHING FREQ-MAX, PDSO5 |
| 935269479115 | 0.3 A SWITCHING REGULATOR, 57.5 kHz SWITCHING FREQ-MAX, PDSO5 |
| 935269476115 | 0.3 A SWITCHING REGULATOR, 57.5 kHz SWITCHING FREQ-MAX, PDSO5 |
| 935269478115 | 0.3 A SWITCHING REGULATOR, 57.5 kHz SWITCHING FREQ-MAX, PDSO5 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 935269544557 | 制造商:NXP Semiconductors 功能描述:SUB ONLY TDA9587-2US1-V1.3 |
| 935269987557 | 制造商:NXP Semiconductors 功能描述:SUB ONLY TDA9587-1US1-V1.8 SUBBED TO 935269987557 |
| 935270713557 | 制造商:NXP Semiconductors 功能描述:SUB ONLY IC CHP |
| 935270792551 | 制造商:NXP Semiconductors 功能描述:IC BUFF DVR TRI-ST 16BIT 56VFBGA |
| 935270792557 | 制造商:NXP Semiconductors 功能描述:IC BUFF DVR TRI-ST 16BIT 56VFBGA |
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