參數(shù)資料
型號(hào): 87LPC769
廠商: NXP Semiconductors N.V.
英文描述: Low power, low price, low pin count(20 pin) microcontroller with 4 kB OTP and 8-bit A/D,and DAC(帶4 kB OTP、8位A/D和D/A轉(zhuǎn)換的低功耗,低價(jià)格,少引腳(20引腳)的微控制器)
中文描述: 低功耗,低價(jià)格,低引腳數(shù)(20針)與4 KB的檢察官辦公室和8位A / D,和DAC(帶4 KB的檢察官辦公室,8位微控制器的A / D和的D / A轉(zhuǎn)換的低功耗,低價(jià)格,少引腳(20引腳)的微控制器)
文件頁數(shù): 35/61頁
文件大?。?/td> 275K
代理商: 87LPC769
Philips Semiconductors
Preliminary specification
87LPC769
Low power, low price, low pin count (20 pin)
microcontroller with 4 kB OTP 8-bit A/D, and DAC
2000 Apr 26
32
Reset
The 87LPC769 has an active low reset input when configured for an
external reset. A fully internal reset may also be configured which
provides a reset when power is initially applied to the device. The
watchdog timer can act as an oscillator fail detect because it uses
an independent, fully on-chip oscillator.
The external reset input is disabled, and fully internal reset
generation enabled, by programming the RPD bit in the EPROM
configuration register UCFG1 to 0. EPROM configuration is
described in the section EPROM Characteristics
SU01384
87LPC769
87LPC769
V
DD
8.2 k
10 F
RST
RST
2.2 F
Figure 23. Typical External Reset Circuits
SU01170
CHIP RESET
CPU
CLOCK
Q
RESET
TIMING
RPD (UCFG1.6)
WDT
MODULE
SOFTWARE RESET
SRST (AUXR1.3)
POWER MONITOR
RESET
RST/V
PP
PIN
WDTE (UCFG1.7)
S
R
Figure 24. Block Diagram Showing Reset Sources
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