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參數(shù)資料
| 型號： | 82C862 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | FireLink USB Dual Controller Quad Port USB |
| 中文描述： | FireLink雙控制器的USB四口USB |
| 文件頁數(shù)： | 44/51頁 |
| 文件大?。?/td> | 321K |
| 代理商： | 82C862 |
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FireLink USB
82C862
912-2000-030
Revision: 1.0
Page 40
7
6
5
4
3
2
1
0
Reserved
MEMOFST 104h
HceInput Register - Bytes 0
Default = 00h
Input Data:
- I/O data that is written to Ports 60h and 64h is captured in this register.
Note:
Refer to Table 4-4, "Emulated Registers and Side Effects", if emulation is enabled.
MEMOFST 105h-107h
HceInput Register - Bytes 1-3
Default = 00h
Reserved
MEMOFST 108h
HceOutput Register - Bytes 0
Default = 00h
Output Data:
- This register hosts data that is returned when an I/O read of Port 60h is performed by application software.
Note:
Refer to Table 4-4, "Emulated Registers and Side Effects", if emulation is enabled.)
MEMOFST 109h-10Bh
HceOutput Register - Bytes 1-3
Default = 00h
Reserved
MEMOFST 10Ch
HceStatus Register - Byte 0
Default = 00h
Parity
Indicates parity
error on
keyboard/mous
e data.
Time-out
Used to indicate
a time-out
Aux Output
Full
Assert IRQ12 if
Output Full bit
(MEMOFST
10Ch[0]) = 1
and IRQEn bit
(MEMOFST
100h[3]) = 1
0 = No
1 = Yes
Inhibit Switch
Reflects state of
the keyboard
inhibit switch:
0 = Inhibited
1 = Not
inhibited
Cmd Data
HC sets this bit
on I/O writes to
Ports 60h and
64h:
0 = Port 60h
1 = Port 64h
Flag
Nominally used
as a system
flag by software
to indicate a
warm or cold
boot.
Input Full
HC sets this bit
to 1 on an I/O
write to Port
60h or 64h
except for the
case of a
GateA20
Sequence.
While set to 1
and emulation
is enabled
(MEMOFST
100h[0] = 1), an
emulation
interrupt
condition exists.
Output Full
HC sets this bit
to 0 on a read
of Port 60h.
While this bit is
0 and the
Character
Pending bit
(MEMOFST
100h[2]) = 1, an
emulation
interrupt
condition exists.
Setting this bit
to 1 will
generate either
IRQ1 or IRQ12
under certain
conditions(1).
(1) If the IRQEn bit (MEMOFST 100h[3]) = 1 and Aux Output Full bit (MEMOFST 10Ch[5]) = 0: IRQ1 is generated.
If the IRQEn bit (MEMOFST 100h[3]) = 1 and Aux Output Full bit (MEMOFST 10Ch[5]) = 1: IRQ12 is generated.
Note:
Refer to Table 4-4, "Emulated Registers and Side Effects", on page 18 if emulation is enabled.
MEMOFST 10Dh-10Fh
HceStatus Register - Bytes 1-3
Default = 00h
Reserved
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相關代理商/技術參數(shù) |
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|---|---|
| 82C86H | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:CMOS Octal Bus Transceiver |
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| 82C87 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:CMOS Octal Inverting Bus Transceiver |
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| 82C871(100QFP) | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:BUS CONTROLLER |
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