參數(shù)資料
型號： 70824L35PFI
廠商： INTEGRATED DEVICE TECHNOLOGY INC
元件分類： SRAM
英文描述： 4K X 16 STANDARD SRAM, 35 ns, PQFP80
封裝： TQFP-80
文件頁數(shù)： 12/21頁
文件大?。?/td> 191K
代理商： 70824L35PFI
2
IDT70824S/L
High-Speed 4K x 16 Sequential Access Random Access Memory
Military and Commercial Temperature Ranges
3099 drw 02
4
5
6
7
8
9
10
INDEX
11
12
13
14
1
80 79 78 77 76 75 74 73 72 71
23 24 25 26 27 28 29 30 31 32 33 34 35
3
2
15
16
17
18
19
20
21 22
36 37 38 39 40
41
42
43
62 61
60
59
58
57
56
55
54
53
52
63
64
51
50
49
48
47
46
45
44
70 69 68 67 66 65
IDT70824PF
PN80-1(4)
80-Pin TQFP
Top View(5)
G
N
D
G
N
D
G
N
D
V
C
V
C
G
N
D
V
C
N
/C
G
N
D
G
N
D
VCC
A10
A9
A8
A7
A6
A5
A4
A3
A1
A2
CMD
CE
LB
UB
R/
W
OE
A11
VCC
A0
SSTRT1
SCLK
GND
SI/O0
N/C
I/O0
CNTEN
SLD
SCE
SR/
W
RST
SSTRT2
SI/O1
GND
EOB2
VCC
SOE
EOB1
I/
O
1
I/
O
1
5
I/
O
1
4
I/
O
1
3
I/
O
1
2
I/
O
2
I/
O
3
V
C
I/
O
4
I/
O
5
I/
O
7
I/
O
6
I/
O
9
I/
O
1
0
I/
O
1
I/
O
8
S
I/
O
9
S
I/
O
7
S
I/
O
5
S
I/
O
1
0
S
I/
O
1
5
S
I/
O
1
4
S
I/
O
8
S
I/
O
1
S
I/
O
1
2
S
I/
O
4
S
I/
O
3
S
I/
O
2
S
I/
O
1
3
S
I/
O
6
,
NOTES:
1. All VCC pins must be connected to power supply.
2. All GND pins must be connected to ground supply.
3. PN80-1 package body is approximately 14mm x 14mm x 1.4mm.
G84-3 package body is approximately 1.12 in x 1.12 in x .16 in.
4. This package code is used to reference the package diagram.
5. This text does not indicate orientation of the actual part-marking.
quencing for the sequential (synchronous) access port.
Fabricated using CMOS high-performance technology, this memory
devicetypicallyoperatesonlessthan775mWofpoweratmaximumhigh-
speed clock-to-data and Random Access. An automatic power down
feature,controlledby
CE,permitstheon-chipcircuitryofeachporttoenter
a very low standby power mode.
The IDT70824 is packaged in a 80-pin Thin Quad Flatpack (TQFP)
or 84-pin Pin Grid Array (PGA). Military grade product is manufactured
in compliance with the latest revision of MIL-PRF-38535 QML, making it
ideally suited to military temperature applications demanding the highest
level of performance and reliability.
Pin Configurations(1,2,3)
,,
3099 drw 03
63
61
60
58
55
54
51
48
46
45
66
67
69
72
75
76
79
81
82
83
12
5
7
8
11
10
12
14
17
20
23
26
28
29
32
31
33
35
38
41
43
IDT70824G
G84-3(4)
84-Pin PGA
Top View(5)
AB
C
D
E
F
G
H
J
K
L
42
59
56
49
50
40
25
27
30
36
34
37
39
84
3
4
6
9
15
13
16
18
22
24
19
21
68
71
70
77
80
11
10
09
08
07
06
05
04
03
02
01
64
65
62
57
53
52
47
44
73
74
78
A3
NC
R/
WUB
A1
CE
A5
A6
A8
A9
A11
I/O14
NC
VCC
CMD
A2
NC
SI/O15
I/O12
I/O13
SI/O14 SI/O13
I/O9
I/O5
I/O8
SI/O9 SI/O10 SI/O6
I/O4
SI/O4 SI/O5
I/O3
GND
SSTRT1
SCLK GND
SI/O2 VCC
I/O7
I/O6 GND
SI/O8 SI/O7 GND
NC
I/O0 EOB2 SOE
RST SLD
SI/O1 SI/O3
SCE SI/O0
I/O1
GND CNTEN GND SSTRT2 SR/
W
GND
NC
VCC
I/O15 GND
OE
A0
LB
VCC
A10
GND
A4
A7
I/O10
VCC
VCC SI/O11
I/O11
SI/O12
I/O2
VCC
GND
Pin 1
Designator
EOB1
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