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參數(shù)資料
| 型號： | 5962R9581901QQX |
| 廠商： | INTERSIL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 24 I/O, PIA-GENERAL PURPOSE, CDIP40 |
| 封裝： | SIDE BRAZED, CERAMIC, DIP-40 |
| 文件頁數(shù)： | 7/17頁 |
| 文件大?。?/td> | 232K |
| 代理商： | 5962R9581901QQX |
15
Special Mode Combination Considerations
There are several combinations of modes possible. For any
combination, some or all of Port C lines are used for control
or status. The remaining bits are either inputs or outputs as
dened by a “Set Mode” command.
During a read of Port C, the state of all the Port C lines,
except the ACK and STB lines, will be placed on the data
bus. In place of the ACK and STB line states, ag status will
appear on the data bus in the PC2, PC4, and PC6 bit
positions as illustrated by Figure 25.
Through a “Write Port C” command, only the Port C pins
programmed as outputs in a Mode 0 group can be written.
No other pins can be affected by a “Write Port C” command,
nor can the interrupt enable ags be accessed. To write to
any Port C output programmed as an output in a Mode 1
group or to change an interrupt enable ag, the “Set/Reset
Port C Bit” command must be used.
With a “Set/Reset Port C Bit” command, any Port C line
programmed as an output (including IBF and OBF) can be
written, or an interrupt enable ag can be either set or reset.
Port C lines programmed as inputs, including ACK and STB
lines, associated with Port C fare not affected by a “Set/
Reset Port C Bit” command. Writing to the corresponding
Port C bit positions of the ACK and STB lines with the “Set/
Reset Port C Bit” command will affect the Group A and
Group B interrupt enable ags, as illustrated in Figure 25.
MODE DEFINITION SUMMARY
MODE 0
MODE 1
MODE 2
IN
OUT
IN
OUT
GROUP A ONLY
PA0
AP1
PA2
PA3
PA4
PA5
PA6
PA7
In
Out
In
Out
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
In
Out
In
Out
-
PC0
PC1
PC2
PC3
PC4
PC5
PC6
PC7
In
Out
INTR B
IBF B
STB B
INTR A
STB A
IBF A
I/O
INTR B
OBF B
ACK B
INTR A
I/O
ACK A
OBF A
I/O
INTR A
STB A
IBF A
ACK A
OBF A
Mode 0 or
Mode 1 Only
INPUT CONFIGURATION
D7
D6
D5
D4
D3
D2
D1
D0
I/O
IBFA
INTEA
INTRA
INTEB
IBFB
INTRB
GROUP A
GROUP B
OUTPUT CONFIGURATION
D7
D6
D5
D4
D3
D2
D1
D0
OBFA INTEA
I/O
INTRA
INTEB OBFB INTRB
GROUP A
GROUP B
FIGURE 23. MODE 1 STATUS WORD FORMAT
D7
D6
D5
D4
D3
D2
D1
D0
OBFA
INTE1
IBFA
INTE2
INTRA
X
GROUP A
GROUP B
NOTE: (Dened by Mode 0 or Mode 1 Selection)
FIGURE 24. MODE 2 STATUS WORD FORMAT
HS-82C55ARH
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| 5962R9583301VFA | 功能描述:LVDS 接口集成電路 RoHS:否 制造商:Texas Instruments 激勵器數(shù)量:4 接收機數(shù)量:4 數(shù)據(jù)速率:155.5 Mbps 工作電源電壓:5 V 最大功率耗散:1025 mW 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-16 Narrow 封裝:Reel |
| 5962R9583301VZA | 功能描述:LVDS 接口集成電路 RoHS:否 制造商:Texas Instruments 激勵器數(shù)量:4 接收機數(shù)量:4 數(shù)據(jù)速率:155.5 Mbps 工作電源電壓:5 V 最大功率耗散:1025 mW 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-16 Narrow 封裝:Reel |
| 5962R9660301VXC2732 | 制造商:Intersil Corporation 功能描述:- Bulk |
| 5962R9662202VXC | 制造商:INTER 功能描述: 制造商:INTERC 功能描述: |
| 5962R9665102VXC | 制造商:Intersil Corporation 功能描述: |
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