1
TM
File Number
3191.2
HS-82C55ARH
Radiation Hardened CMOS Programmable
Peripheral Interface
The Intersil HS-82C55ARH is a high performance, radiation
hardened CMOS version of the industry standard 8255A and
is manufactured using a hardened eld, self-aligned silicon
gate CMOS process. It is a general purpose programmable
I/O device which may be used with many different
microprocessors. There are 24 I/O pins which are organized
into two 8-bit and two 4-bit ports. Each port may be
programmed to function as either an input or an output.
Additionally, one of the 8-bit ports may be programmed for
bidirectional operation, and the two 4-bit ports can be
programmed to provide handshaking capabilities. The high
performance, radiation hardness, and industry standard
conguration of the HS-82C55ARH make it compatible with
the HS-80C86RH radiation hardened microprocessor.
Static CMOS circuit design insures low operating power. Bus
hold circuitry eliminates the need for pull-up resistors. The
Intersil hardened eld CMOS process results in performance
equal to or greater than existing radiation resistant products
at a fraction of the power.
Specications for Rad Hard QML devices are controlled
by the Defense Supply Center in Columbus (DSCC). The
SMD numbers listed here must be used when ordering.
Detailed Electrical Specications for these devices are
contained in SMD 5962-95819. A “hot-link” is provided
on our homepage for downloading.
www.intersil.com/spacedefense/space.asp
Features
Electrically Screened to SMD # 5962-95819
QML Qualied per MIL-PRF-38535 Requirements
Radiation Hardened
- Total Dose . . . . . . . . . . . . . . . . . . . . . 100 krad(Si) (Max)
- Transient Upset . . . . . . . . . . . . . . . . . . . . <108 rad(Si)/s
- Latch Up Free EPI-CMOS
Low Power Consumption
- IDDSB. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
A
Pin Compatible with NMOS 8255A and the Intersil 82C55A
High Speed, No “Wait State” Operation with 5MHz
HS-80C86RH
24 Programmable I/O Pins
Bus-Hold Circuitry on All I/O Ports Eliminates Pull-Up
Resistors
Direct Bit Set/Reset Capability
Enhanced Control Word Read Capability
Hardened Field, Self-Aligned, Junction Isolated CMOS
Process
Single 5V Supply
2.0mA Drive Capability on All I/O Port Outputs
Military Temperature Range . . . . . . . . . . . -55oC to 125oC
Pinout
CERAMIC DUAL-IN-LINE METAL SEAL PACKAGE (SBDIP)
MIL-STD-1835 CDIP2-T40
TOP VIEW
Ordering Information
ORDERING NUMBER
INTERNAL
MKT. NUMBER
TEMP. RANGE
(oC)
5962R9581901QQC
HS1-82C55ARH-8
-55 to 125
5962R9581901VQC
HS1-82C55ARH-Q
-55 to 125
13
1
2
3
4
5
6
7
8
9
10
11
12
14
15
16
17
18
19
20
PA3
PA2
PA1
PA0
RD
CS
GND
A1
A0
PC7
PC6
PC5
PC4
PC0
PC1
PC2
PC3
PB0
PB1
PB2
28
40
39
38
37
36
35
34
33
32
31
30
29
27
26
25
24
23
22
21
PA4
PA5
PA6
PA7
WR
RESET
D0
D1
D2
D3
D4
D5
D6
D7
VDD
PB7
PB6
PB5
PB4
PB3
Data Sheet
August 2000
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
| Intersil and Design is a trademark of Intersil Corporation. | Copyright Intersil Corporation 2000