6
Functional Description
The HS-82C55ARH is a programmable peripheral interface
designed to allow microcomputer systems to control and
interface with all types of peripheral devices. It has the ability
to generate and respond to all asynchronous handshaking
signals necessary to transfer data to and from peripheral
devices, and it can also interrupt the processor when a
peripheral needs servicing. These capabilities allow the
HS-82C55ARH to be used in an unlimited number of
applications including EXTERNAL SYSTEM CONTROL,
ASYNCHRONOUS DATA TRANSFER, and SYSTEMS
MONITORING.
Data Bus Buffer
This three-state bidirectional 8-bit buffer is used to interface
the HS-82C55ARH to the system data bus (see Figure 8).
Data is transmitted or received by the buffer upon execution
of input or output instructions by the CPU. Control words and
status information are also transferred through the data bus
buffer.
Read/Write and Control Logic
The function of this block is to manage all of the internal and
external transfer of both Data and Control or Status words. It
accepts inputs from the CPU Address and Control busses
and in turn, issues commands to both of the Control Groups.
Group A and Group B Controls
The functional conguration of each port is programmed by
the systems software. In essence, the CPU writes a control
word to the HS-82C55ARH. The control word contains
information such as “mode”, “bit set”, “bit reset”, etc., that
initializes the functional conguration of the HS-82C55ARH.
Each of the Control blocks (Group A and Group B) accepts
“commands” from the Read/Write Control Logic, receives
“control words” from the internal data bus and issues the
proper commands to its associated ports.
Control Group - Port A and Port C upper (C7 - C4).
Control Group - Port B and Port C lower (C3 - C0).
Ports A, B, C
The HS-82C55ARH contains three 8-bit ports (A, B and C).
All can be congured to a wide variety of functional
characteristics by the system software but each has its own
special features or “personality” to further enhance the
power and exibility of the HS-82C55ARH.
Irradiation Circuit
CMOS PROGRAMMABLE PERIPHERAL INTERFACE
NOTE:
13. VDD = 5.5V
13
1
2
3
4
5
6
7
8
9
10
11
12
14
15
16
17
18
19
20
28
40
39
38
37
36
35
34
33
32
31
30
29
27
26
25
24
23
22
21
+5.5V
Port A
One 8-bit data output latch/buffer and one 8-bit data input
latch. Both “pull-up” and “pull-down” bus hold devices are
present on Port A. See Figure 9A.
Port B
One 8-bit data input/output latch/buffer and one 8-bit data
input buffer. See Figure 9B.
GROUP
POWER
SUPPLIES
DATA
BUS
BUFFER
GROUP
READ/
RD
WR
A1
A0
RESET
CS
D7-
BIDIRECTIONAL
DATA BUS
+5V
GND
8-BIT INTERNAL
DATA BUS
GROUP
B PORT
B (8)
GROUP
B PORT
C LOWER
GROUP
A PORT
C UPPER
GROUP
A PORT
A (8)
I/O
PA7-
WRITE
CONTROL
LOGIC
D0
PA0
I/O
PC7-
PC4
I/O
PC3-
PC0
I/O
PB7-
PB0
A
CONTROL
B
CONTROL
(4)
FIGURE 8. BLOCK DIAGRAM DATA BUS BUFFER,
READ/WRITE, GROUP A AND B CONTROL
LOGIC FUNCTIONS
HS-82C55ARH