參數(shù)資料
型號: 5962R9581901QQX
廠商: INTERSIL CORP
元件分類: 微控制器/微處理器
英文描述: 24 I/O, PIA-GENERAL PURPOSE, CDIP40
封裝: SIDE BRAZED, CERAMIC, DIP-40
文件頁數(shù): 5/17頁
文件大小: 232K
代理商: 5962R9581901QQX
13
Output Control Signal Denition
OBF (Output Buffer Full F/F)
The OBF output will go “l(fā)ow” to indicate that the CPU has
written data out to the specied port. This does not mean
valid data is sent out of the port at this time since OBF can
go true before data is available. Data is guaranteed valid at
the rising edge of OBF. See Note 1. The OBF F/F will be set
by the rising edge of the WR input and reset by ACK input
being low.
ACK (Acknowledge Input)
A “l(fā)ow” on this input informs the HS-82C55ARH that the data
from Port A or Port B is ready to be accepted. In essence, a
response from the peripheral device indicating that it is
ready to accept data. See Note 14.
INTR (Interrupt Request)
A “high” on this output can be used to interrupt the CPU
when an output device has accepted data transmitted by the
CPU. INTR is set by the rising edge of ACK and reset by the
falling edge of WR.
INTE A
Controlled by Bit Set/Reset of PC6.
INTE B
Controlled by Bit Set/Reset of PC2.
NOTE:
14. To strobe data into the peripheral device, the user must operate
the strobe line in a hand shaking mode. The user needs to send
OBF to the peripheral device, generate an ACK from the
peripheral device and then latch data into the peripheral device
on the rising edge of OBF.
Combinations of Mode 1: Port A and Port B can be
individually dened as input or output in Mode 1 to support a
wide variety of strobed I/O applications.
STB
IBF
INTR
RD
INPUT FROM
PERIPHERAL
TSLSH
TSLIH
TSHPX
TPVSH
TRHIL
TRLNL
TSHNH
FIGURE 16. MODE 1 (STROBED INPUT)
INTE
A
D7 D6 D5 D4 D3 D2 D1 D0
1
CONTROL WORD
MODE 1 (PORT B)
10
PA7 - PA0
PC7
PC6
PC3
PC4, 5
WR
8
OBF
ACK
INTR
I/O
2
A
INTE
B
PB7 - PB0
PC1
PC2
PC0
WR
8
OBF
ACK
INTR
B
D7 D6 D5 D4 D3 D2 D1 D0
1010 1/0
CONTROL WORD
PC4, 5
1 = INPUT
0 = OUTPUT
MODE 1 (PORT A)
FIGURE 17. MODE 1 OUTPUT
WR
OBF
INTR
ACK
OUTPUT
TWLNL
TWHOL
TKHOL
TWHPV
TKLKH
TKHNH
FIGURE 18. MODE 1 (STROBED OUTPUT)
D7 D6 D5 D4 D3 D2 D1 D0
1
CONTROL WORD
PORT A (STROBED INPUT)
10
PORT B (STROBED OUTPUT)
0
1
1/0
PC6, 7
1 = INPUT
0 = OUTPUT
PA7 - PA0
PC4
PC5
PC6, 7
WR
8
STB A
IBF A
INTR A
PC3
PB7 - PB0
PC1
PC2
PC0
I/O
OBF B
ACK B
INTR B
8
2
RD
D7 D6 D5 D4 D3 D2 D1 D0
1
CONTROL WORD
PORT A (STROBED OUTPUT)
11
PORT B (STROBED INPUT)
0
1
0
1/0
PC4, 5
1 = INPUT
0 = OUTPUT
PA7 - PA0
PC7
PC6
PC4, 5
RD
8
OBF A
ACK A
INTR A
PC3
PB7 - PB0
PC2
PC1
PC0
I/O
STB B
IBF B
INTR B
8
2
WR
FIGURE 19. COMBINATIONS OF MODE 1
HS-82C55ARH
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