參數(shù)資料
型號(hào)： 5962-9855201VXC
元件分類： 微控制器/微處理器
英文描述： 32-BIT, 12 MHz, RISC MICROCONTROLLER, CPGA144
封裝： CERAMIC, PGA-144
文件頁(yè)數(shù)： 3/64頁(yè)
文件大?。?/td> 1464K
代理商： 5962-9855201VXC
11
Bit 4
INT3
External Interrupt 3
Bit 3
INT5
External Interrupt 5
Bit 2
INT4
External Interrupt 4
Bit 1
INT6
External Interrupt 6
Bit 0
NU
Not Used*
*Note:
The UT69R000 interrupt control hardware is designed such that the following sequence always occurs:
The machine will vector to the lowest priority interrupt (vector 43Chex) if interrupts are disabled after an interrupt is latched into
the PI register. Interrupts are latched into the PI register on the falling edge of STATE1, interrupts are disabled on the falling edge
of clock CK1 internal (rising edge of CK2). The UT69R000 vectors to address 43C (hex) during the fetch cycle of the command
following the disable command.
Work Around: Vector 43C hex is not used as a normal interrupt; instead it is used to store the interrupt that occurred coincident with
disabling of interrupts. The coincident interrupt is serviced after the interrupts are re-enabled by software.
43C:
INR RD, ICS
JC x, PSEUDO
NOP
PSEUDO:
INR RD, PI
; read PI
OTR RD, RPI
:clear PI
OTR RD, PI
;reset PI register, saves coincident interrupt
CALL RD, RD
;return
The interrupt service routine saves the interrupt that was coincident with the disable interrupt instruction. The UT69R000 will vector
to that interrupt after interrupts are re-enabled. The interrupt service routine (@43C) does not affect the condition code flags.
相關(guān)PDF資料
PDF描述
5962-9855202QXC 32-BIT, 16 MHz, RISC MICROCONTROLLER, CPGA144
5962-9855202QXX 32-BIT, 16 MHz, RISC MICROCONTROLLER, CPGA144
5962F9855202QXA 32-BIT, 16 MHz, RISC MICROCONTROLLER, CPGA144
5962G9855201QXX 32-BIT, 12 MHz, RISC MICROCONTROLLER, CPGA144
5962G9855202VXA 32-BIT, 16 MHz, RISC MICROCONTROLLER, CPGA144
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