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參數(shù)資料
| 型號： | 5962-9855201VXC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, 12 MHz, RISC MICROCONTROLLER, CPGA144 |
| 封裝： | CERAMIC, PGA-144 |
| 文件頁數(shù)： | 11/64頁 |
| 文件大?。?/td> | 1464K |
| 代理商： | 5962-9855201VXC |
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19
Executing the LRI instruction begins when the falling edge of
OSCIN signals the start of time period CK1. At the beginning
of CK1, the data previously stored in the ACC becomes a valid
address on the instruction port address bus (RA(19:0)) and
STATE1 output becomes active indicating the UT69R000 is
executing an instruction.
The data on the data bus is read into the UT69R000 during time
period CK2. The function of the remainder of the bus cycle
(time periods CK3 and CK4) is the same as for other
instructions. STATE1 is high, indicating the next instruction is
being fetched from memory and is ready for execution during
the next bus cycle.
4.0 Operand Port
The UT69R000 Operand Data bus interface supports multiple
processor and direct memory access (DMA) configurations.
The Operand Address bus A(15:0), data bus D(15:0), and
memory control bus signals (DS, R/WR, and M/IO) are TTL-
compatible outputs that may be placed in a high-impedance
state. These signals are only active during bus cycles when the
UT69R000 is the current bus master. On other bus cycles, these
signals enter a high-impedance state so an alternate bus master
can control the port.
OSCIN
CK1
CK2
CK3
CK4
STATE1
Figure 17. Machine Cycle 3 (4 Clock Cycle Instructions)
EXECUTE
RA(19:0)
RD(15:0)
Note:
1. Examples of three clock cycle instructions include (long immediate accesses):
MOV Rd, FFFF (hex)
ADD Rd, FFFF (hex)
STATUS
DS
A(15:0)
D(15:0)
Address Valid
Data Read
Control Valid
Fetch Address Valid
Fetch Instruction
Immediate Address
Immediate Data
FETCH
Fetch Address Valid
Fetch Instruction
(M/IO, R/WR)
相關PDF資料 |
PDF描述 |
|---|---|
| 5962-9855202QXC | 32-BIT, 16 MHz, RISC MICROCONTROLLER, CPGA144 |
| 5962-9855202QXX | 32-BIT, 16 MHz, RISC MICROCONTROLLER, CPGA144 |
| 5962F9855202QXA | 32-BIT, 16 MHz, RISC MICROCONTROLLER, CPGA144 |
| 5962G9855201QXX | 32-BIT, 12 MHz, RISC MICROCONTROLLER, CPGA144 |
| 5962G9855202VXA | 32-BIT, 16 MHz, RISC MICROCONTROLLER, CPGA144 |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| 5962-9855501VPA | 功能描述:計時器和支持產(chǎn)品 QML Class V Prec Timer RoHS:否 制造商:Micrel 類型:Standard 封裝 / 箱體:SOT-23 內部定時器數(shù)量:1 電源電壓-最大:18 V 電源電壓-最小:2.7 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝:Reel |
| 59629856401QEA | 制造商:TI 功能描述:SNJ5447AJ |
| 5962-9856401QEA | 制造商:Texas Instruments 功能描述:Decoder/Driver Single 4-to-7 16-Pin CDIP Tube |
| 5962-9858401QFA | 功能描述:LVDS 接口集成電路 RoHS:否 制造商:Texas Instruments 激勵器數(shù)量:4 接收機數(shù)量:4 數(shù)據(jù)速率:155.5 Mbps 工作電源電壓:5 V 最大功率耗散:1025 mW 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-16 Narrow 封裝:Reel |
| 5962-9858501QFA | 功能描述:總線接收器 RoHS:否 制造商:Texas Instruments 接收機數(shù)量:4 接收機信號類型:Differential 接口類型:EIA/TIA-422-B, V.11 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:TSSOP-16 封裝:Reel |
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