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| 型號(hào)： | 28F160C3 |
| 廠商： | INTEL CORP |
| 元件分類： | DRAM |
| 英文描述： | 3 Volt Advanced Boot Block Flash Memory(3 V 高級(jí)快速引導(dǎo)塊閃速存儲(chǔ)器) |
| 中文描述： | 8M X 8 FLASH 3V PROM |
| 文件頁(yè)數(shù)： | 28/59頁(yè) |
| 文件大小： | 321K |
| 代理商： | 28F160C3 |
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28F800C3, 28F160C3, 28F320C3
E
28
PRELIMINARY
4.4
DC Characteristics,
Continued
V
CC
2.7 V
–3.6 V
V
CCQ
2.7 V–3.6 V
Sym
Parameter
Note
Min
Max
Unit
Test Conditions
V
IL
Input Low Voltage
–0.4
V
CC
*0.22 V
V
CCQ
+0.3 V
0.10
V
V
IH
Input High Voltage
2.0
V
V
OL
Output Low Voltage
7
–0.10
V
V
CC
= V
CC
Min
V
CCQ
= V
CCQ
Min
I
OL
= 100
μ
A
V
CC
= V
CC
Min
V
CCQ
= V
CCQ
Min
I
OH
= –100
μ
A
V
OH
Output High Voltage
7
V
CCQ
–
0.1 V
V
V
PPLK
V
PP
Lock-Out Voltage
3
1.0
V
Complete Write Protection
V
PP1
V
PP
during Program / Erase
Operations
3
1.65
3.6
V
V
PP2
3,6
11.4
12.6
V
LKO
V
CC
Prog/Erase Lock Voltage
1.5
V
V
LKO2
V
CCQ
Prog/Erase Lock
Voltage
1.2
V
NOTES:
1.
2.
All currents are in RMS unless otherwise noted. Typical values at nominal V
CC
, T
A
=
+25 °C.
I
CCES
and I
CCWS
are specified with device de-selected. If device is read while in erase suspend, current draw is sum of
I
CCES
and I
CCR
. If the device is read while in program suspend, current draw is the sum of I
CCWS
and I
CCR
.
Erase and Program are inhibited when V
PP
< V
PPLK
and not guaranteed outside the valid V
PP
ranges of V
PP1
and V
PP2
.
Sampled, not 100% tested.
Automatic Power Savings (APS) reduces I
CCR
to approximately standby levels in static operation (CMOS inputs).
Applying V
= 11.4 V–12.6 V during program/erase can only be done for a maximum of 1000 cycles on the main blocks
and 2500 cycles on the parameter blocks. V
PP
may be connected to 12 V for a total of 80 hours maximum. See Section
3.4 for details.
The test conditions V
Max, V
CCQ
Max, V
CC
Min, and V
CCQ
Min refer to the maximum or minimum V
CC
or V
CCQ
voltage
listed at the top of each column.
3.
4.
5.
6.
7.
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