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5.0 Reassembly Coprocessor
5.6 Status Queue Operation
RS8234
Datasheet for RS8234 xBR ServiceSAR
N8234DS1B
To poll each status queue, the Host continuously reads the VLD bit at the cur-
rent READ position until it returns a logic high. The Host then processes the sta-
tus entry, writes the VLD bit to a logic low and increments its current READ
pointer. Periodically, the Host writes the current READ index value into the
READ_UD field of the status queue base table entry.
The Host can also use an interrupt routine to process status queues. When the
reassembly coprocessor writes a status queue entry into Host memory, the
HOST_ISTAT0 (RSM_HS_WRITE) bit is set to a logic high to prompt an inter-
rupt.
Upon
receiving
an
interrupt,
the
Host
reads
HOST_ST_WR
(RSM_HS_WRITE[15:0]) to determine which Host memory status queue(s)
caused the interrupt. (Note that only status queues 0 through 15 are reported in
this register.) A typical operation for the interrupt manager would be to only read
HOST_ISTAT1 upon receiving an interrupt, and periodically read HOST_ISTAT0
to ensure that no error conditions have occurred. Once the interrupt manager has
determined which status queue(s) caused the interrupt, the Host starts reading the
appropriate status queues at their current read location. The Host processes status
entries until reading an entry with the VLD bit set to logic low. Again, the Host
periodically writes the current READ index value into the READ_UD field of the
status queue base table entry.
5.6.2 Status Queue Overflow or Full Condition
A status queue overflow or full condition is entered when the last available status
queue entry is written. The reassembly coprocessor detects the condition by com-
paring the WRITE and READ_UD index pointers in the corresponding status
queue base table. Upon detecting a status overflow condition, the Rsm coproces-
sor sets the internal OVFL bit in the last status queue entry written to a logic high,
to indicate the condition. The Rsm coprocessor also sets to one either the
RSM_HS_FULL bit in the HOST_ISTAT1 register, or the RSM_LS_FULL bit in
the LP_ISTAT1 register, to prompt an interrupt.
While the reassembly coprocessor is in status full condition, it discards all
cells. If a COM or EOM cell is received while the status queue is full, the channel
is marked for status full packet discard. When an SSM, EOM, or OAM cell is
received during a status full condition, the cell is discarded and the status queue
checked. If there is now room in the status queue, then the status full condition is
exited.
For multiple peer configurations, an interrupt manager can be configured by
the user to detect the full condition and advise the peers to check if their queues
have overflowed. Each peer would then check the OVFL bit in the last status
queue entry written (pointed to by READ_UD - 1), to determine if that peer’s sta-
tus queue has filled. If the OVFL bit is not set to a logic high, the Host should also
check the entry pointed to by (READ_UD2 - 1) to determine if an overflow con-
dition occurred during a Host update of the READ_UD index pointer. Since the
reassembly coprocessor recovers from the overflow condition automatically, the
Host does not have to determine which queue overflowed.
After a status group has exited a full condition, the Rsm coprocessor will per-
form EPD on channels marked for packet discard due to the status overflow con-
dition, when a cell is received on any of those channels. Cells up to and including
the next EOM will also be discarded.
Status queue overflow protection may be globally disabled by setting
RSM_CTRL0(RSM_STAT_DIS) to a logic high.