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2.0 Architecture Overview
2.3 Automated Segmentation Engine
RS8234
Datasheet for RS8234 xBR ServiceSAR
N8234DS1B
2.3 Automated Segmentation Engine
The RS8234 can segment up to 64 k VCCs simultaneously. The segmentation
coprocessor block independently segments each channel and multiplexes the
VCCs onto the line with cell level interleaving. For each cell transmission oppor-
tunity, the xBR Traffic Manager tells the segmentation coprocessor which VCC
to send.
The RS8234 provides full support of the AAL5 and AAL3/4 protocols as well
as a transparent or NULL adaptation layer, AAL0.
Each segmentation channel is specified as a single entry in the Segmentation
VCC Table located in SAR shared memory. A VCC specifies a single Virtual Cir-
cuit (VC) or Virtual Path (VP) in the ATM network. These VCC Table entries
define the negotiated or contracted characteristics of the traffic for that channel,
and are initialized by the Host either during system initialization or on-the-fly
during operation. An initialized Segmentation VCC Table entry effectively estab-
lishes a connection on which data can be segmented. (Note: ABR VCCs occupy
two table entries.)
The Host submits data for segmentation by first linking buffer descriptors
which point to the buffers containing the PDU to be transmitted, and then submit-
ting that chained message to the SAR by writing to one of 32 independent circular
transmit queues.
The segmentation coprocessor then operates autonomously, formatting the
cells on each channel according to the host-defined Segmentation VCC Table
entries for each channel. These formatting functions include the following:
The segmentation coprocessor formats the ATM cell header for each cell
based on the settings in the Segmentation VCC Table entry for that VCC.
The segmentation coprocessor also generates the CPCS-PDU header and
trailer fields in the first and last cell of the segmented PDU.
For AAL5 traffic, the Seg coprocessor also generates the PDU-specific
fields in the trailer of the CPCS-PDU, and places these in the last cell (the
End of Message [EOM] cell) for the PDU.
Each AAL3/4 cell carries 44 octets of payload and four octets (in five
fields) of header and trailer information. The SAR performs the formatting
steps necessary to create AAL3/4 cells.
AAL0 is intended for client-proprietary use. For AAL0, the Segmentation
Coprocessor segments the Service Data Unit (SDU) to ATM cell payload
boundaries and generates ATM cell headers, but generates no other over-
head fields.
The user has per-channel, per-PDU control of Raw Cell Mode segmenta-
tion, wherein the segmentation coprocessor reads the entire 52-octet ATM
cell from the segmentation buffer and does not generate the ATM headers
for the cells.
The formatted cells are passed through the transmit FIFO to the PHY inter-
face for transmission.
The system designer can set the depth of the transmit FIFO from one to nine
cells deep in order to optimize the balance between Cell Delay Variation (CDV)