參數(shù)資料
型號(hào): ZR36060PQC
廠商: Electronic Theatre Controls, Inc.
元件分類(lèi): Codec
英文描述: Integrated JPEG CODEC
中文描述: 綜合JPEG編解碼器
文件頁(yè)數(shù): 10/46頁(yè)
文件大?。?/td> 307K
代理商: ZR36060PQC
8
Integrated JPEG CODEC
3.0 VIDEO INTERFACE
The video interface of the ZR36060 is highly configurable, to
facilitate a glueless connection to most video decoders, encod-
ers, MPEG decoders, frame memory controllers, graphics
accelerators, etc.
3.1 Video Syncs - Master and Slave Modes
The ZR36060 supports two video sync source modes:
Sync Master - the ZR36060 internally generates all the video
timing signals.
Sync Slave - the ZR36060 synchronizes itself with an exter-
nal video source.
The 1-bit SyncMstr parameter selects the mode. Normally, in
compression the ZR36060 would be slaved to the output of a
video decoder, but not necessarily; for example, the ZR36060
could control a frame memory in Sync Master mode.
3.1.1 Master mode
When configured as a sync Master, the ZR36060 drives the fol-
lowing signals:
HSYNC - Horizontal sync
VSYNC - Vertical sync
FI - Even/Odd field indication
BLANK - Composite blanking
The parameters that configure the sync generator when the
ZR36060 is a sync master are (see Figure 3):
Vtotal - Total number of lines per frame (e.g.- for NTSC, 525
video lines)
Htotal - Total number of VCLKs (pixels) per line (e.g.- for
CCIR NTSC, 858 pixels)
VsyncSize - Length of the VSYNC pulse measured in lines
HsyncSize - Length of HSYNC pulse measured in VCLKs
BVstart - Length (in lines) from VSYNC to first non-BLANK
line.
BVend - Length (in lines) from VSYNC to last non-BLANK
line.
BHStart - Length (in pixels) from HSYNC to first non-BLANK
pixel.
BHend - Length (in pixels) from HSYNC to last non-BLANK
pixel.
VSPol - Polarity of the VSYNC signal
HSPol - Polarity of the HSYNC signal
FIPol - Polarity of the FI signal
BlPol - Polarity of the BLANK signal
DATERR
O
This output is asserted when there is a data corruption event. It is deasserted together with the deassertion (rising edge) of
END upon beginning of the next field process. On deassertion, DATERR is floating (needs external pull-up).
During and after RESET this pin is floating (logic high with pullup).
RTBSY
O
In compression this output signal indicates a “nearly full” condition in the internal raster-to-block memory (“strip” buffer). This
condition occurs when the strip buffer is 16 (or fewer) pixels away from an overflow condition.
In decompression RTBSY indicates that the strip buffer is nearly empty, i.e., during every 8*n line of video there are enough
blocks to display the next video line. Otherwise an underflow condition occurs.
In IDLE state RTBSY is not asserted.
If while RTBSY is asserted a data corruption event occurs (overflow or underflow), RTBSY continues to be asserted together
with DATERR until the beginning of the next field process (deassertion of END). If no data corruption occurs, RTBSY is deas-
serted as soon as the almost-overflow/underflow condition is no longer true.
RTBSY is meant to be connected to the RTBSY input of the ZR36057.
During and after RESET this pin is a logic high.
JIRQ
O
Interrupt request (active low). This output signal requests an interrupt from the host controller, if an interrupt request is enabled
and one of the events associated with interrupts occurs. It is deasserted if the host responds to the interrupt by reading the
interrupt status register, or if the host disables the interrupt, or upon a reset to the ZR36060.
On deassertion JIRQ is floating (needs external pull-up).
When JIRQ is active, the START signal is disregarded.
During and after RESET this pin is floating (logic high).
COMP
O
Compress/Decompress. This output signal provides an indication of the current operating mode of the ZR36060. When it is
high, the ZR36060 is in the compression mode; when it is low, the ZR36060 is in the decompression mode.
During and after RESET this pin is a logic high.
Power Signals
GND
Ground
V
DD
Power supply (3.3V)
NC
Non-connect pins (reserved).
Table 1: Pin Descriptions (Continued)
Symbol
Type
Description
相關(guān)PDF資料
PDF描述
ZR36067 AV PCI CONTROLLER
ZR36067PQC AV PCI CONTROLLER
ZR36067 PCI Adapter Intended for Multimedia Applications on PCI Systems(PCI(外圍部件互連)適配器(用于PCI系統(tǒng)的多媒體))
ZR36215 SupraAV SVCD Decoder(SupraAV 超級(jí)VCD解碼器)
ZR36419 Digital Camera Processor(數(shù)字?jǐn)z影處理器)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ZR36060PQC-27 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:
ZR36060PQC-29.5 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:
ZR36067 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:AV PCI CONTROLLER
ZR36067PQC 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:AV PCI CONTROLLER
ZR36067PQC-LV 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:Peripheral IC