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參數(shù)資料
| 型號： | ZL50120GAG |
| 廠商： | ZARLINK SEMICONDUCTOR INC |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | 32, 64 and 128 Channel CESoP Processors |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PBGA324 |
| 封裝： | 23 X 23 MM, 2.03 MM HEIGHT, 1 MM PITCH, PLASTIC, MS-034, BGA-324 |
| 文件頁數(shù)： | 32/95頁 |
| 文件大小： | 1157K |
| 代理商： | ZL50120GAG |
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ZL50115/16/17/18/19/20
Data Sheet
32
Zarlink Semiconductor Inc.
M0_RBC0
I U
B9
TBI - M0_RBC0.
Used as a clock when in TBI mode. Accepts
62.5 MHz and is 180°C out of phase with
M0_RBC1. Receive data is clocked at
each rising edge of M0_RBC1 and
M0_RBC0, resulting in 125 MHz sample
rate.
M0_RBC1
I U
B8
TBI - M0_RBC1
Used as a clock when in TBI mode. Accepts
62.5 MHz, and is 180° out of phase with
M0_RBC0. Receive data is clocked at each
rising edge of M0_RBC1 and M0_RBC0,
resulting in 125 MHz sample rate.
M0_COL
I D
A7
GMII/MII - M0_COL.
Collision Detection. This signal is
independent of M0_TXCLK and
M0_RXCLK, and is asserted when a
collision is detected on an attempted
transmission. It is active high, and only
specified for half-duplex operation.
M0_RXD[7:0]
I U
[7]
[6]
[5]
[4]
A4
A5
D8
A6
[3]
[2]
[1]
[0]
C8
D10
C9
B7
Receive Data. Only half the bus (bits [3:0])
are used in MII mode. Clocked on rising
edge of M0_RXCLK (GMII/MII) or the rising
edges of M0_RBC0 and M0_RBC1 (TBI).
M0_RXDV /
M0_RXD[8]
I D
C7
GMII/MII - M0_RXDV
Receive Data Valid. Active high. This signal
is clocked on the rising edge of M0_RXCLK.
It is asserted when valid data is on the
M0_RXD bus.
TBI - M0_RXD[8]
Receive Data. Clocked on the rising edges
of M0_RBC0 and M0_RBC1.
M0_RXER /
M0_RXD[9]
I D
D6
GMII/MII - M0_RXER
Receive Error. Active high signal indicating
an error has been detected. Normally valid
when M0_RXDV is asserted. Can be used in
conjunction with M0_RXD when M0_RXDV
signal is de-asserted to indicate a False
Carrier.
TBI - M0_RXD[9]
Receive Data. Clocked on the rising edges
of M0_RBC0 and M0_RBC1.
MII Port 0
Signal
I/O
Package Balls
Description
Table 8 - MII Port 0 Interface Package Ball Definition (continued)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ZL50118GAG | Connector assemblies, Network cables; |
| ZL50117GAG | REFLECTIVE PHOTOSENSOR SMD RSS42 |
| ZL50115 | 32, 64 and 128 Channel CESoP Processors |
| ZL50116 | 32, 64 and 128 Channel CESoP Processors |
| ZL50117 | 32, 64 and 128 Channel CESoP Processors |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ZL50120GAG2 | 制造商:Microsemi Corporation 功能描述:CESOP PROCESSOR 324BGA - Trays 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC CESOP PROCESSOR 128CH 324PBGA 制造商:Microsemi Corporation 功能描述:IC CESOP PROCESSOR 128CH 324PBGA |
| ZL50130 | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Ethernet Pseudo-Wires across a PSN |
| ZL50130GAG | 制造商:Microsemi Corporation 功能描述:ETHERNET PSEUDO-WIRES 384BGA - Trays |
| ZL50130PBGA | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Ethernet Pseudo-Wires across a PSN |
| ZL50211 | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:256 Channel Voice Echo Canceller |
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