參數(shù)資料
型號: ZL50022
廠商: Zarlink Semiconductor Inc.
英文描述: Enhanced 4 K Digital Switch with Stratum 4E DPLL
中文描述: 增強(qiáng)為4 K數(shù)字交換與地層4E條數(shù)字鎖相環(huán)
文件頁數(shù): 63/121頁
文件大?。?/td> 939K
代理商: ZL50022
ZL50022
Data Sheet
63
Zarlink Semiconductor Inc.
Bit
Name
Description
15 - 0
BERL[n]
BER Receiver Lock[n]:
If BERL[n] is high, it indicates that BER Receiver of STi[n] is locked.
If BERL[n] is low, it indicates that BER Receiver of STi[n] is not locked.
Note: [n] denotes input stream from 16 - 31.
Table 27 - BER Receiver Lock Register 1 (BERLR1) Bits - Read Only
Bit
Name
Description
15-6
Unused
Reserved
In normal functional mode, these bits
MUST
be set to zero.
5
ST4_LIM
Stratum 4E Limits Select Bit
When this bit is high, the Stratum 4E limits are used for reference monitoring (i.e.
+/-64.713 ppm and +/-82.487 ppm over 10 seconds).When this bit is low, more relaxed
Relaxed Stratum 4E limits are used for reference monitoring (i.e. +/-240 ppm and
+/-250 ppm over 10 seconds). This is used in applications where a low quality clock
(+/-100 ppm) is used as a reference.
4-2
Unused
Reserved
In normal functional mode, these bits
MUST
be set to zero.
1
RFRE
Reference Frequency Register Enable
When this bit is low, the reference frequency value used in the DPLL comes from
appropriate reference frequency detector. When this bit is high, the reference frequency
value comes from Reference Frequency Register (RFR).
0
DPLL_
IRM
DPLL Internal Reset Mode
When this bit is low, the DPLL module is in the operational state. When this bit is high,
the DPLL module is in the power saving mode. Registers are not reset and are still
accessible in the power saving mode.
Table 28 - DPLL Control Register (DPLLCR) Bits
External Read Address: 00014
H
Reset Value: 0000
H
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
BER
L31
BER
L30
BER
L29
BER
L28
BER
L27
BER
L26
BER
L25
BER
L24
BER
L23
BER
L22
BER
L21
BER
L20
BER
L19
BER
L18
BER
L17
BER
L16
External Read/Write Address: 0040
H
Reset Value: 0000
H
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
0
0
ST4_
LIM
0
0
0
RFRE
DPLL
_IRM
相關(guān)PDF資料
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ZL50022_06 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Enhanced 4 K Digital Switch with Stratum 4E DPLL
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ZL50022GAG2 制造商:Microsemi Corporation 功能描述:SWIT FABRIC 4K X 4K 1.8V/3.3V 256BGA - Trays 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC TDM SWITCH 4K-CH ENH 256PBGA 制造商:Microsemi Corporation 功能描述:IC TDM SWITCH 4K-CH ENH 256PBGA
ZL50022QCC 制造商:Microsemi Corporation 功能描述: 制造商:Microsemi Corporation 功能描述:4K WITH RATE CONVERSION AND S4E DPLL - Trays
ZL50022QCG1 制造商:Microsemi Corporation 功能描述:PB FREE 4K +RATE CONVERSION & 256L LQFP - Trays 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC TDM SWITCH 4K-CH ENH 256LQFP 制造商:Microsemi Corporation 功能描述:IC TDM SWITCH 4K-CH ENH 256LQFP