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參數(shù)資料
| 型號： | ZL30101QDC |
| 廠商： | ZARLINK SEMICONDUCTOR INC |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | T1/E1 Stratum 3 System Synchronizer |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PQFP64 |
| 封裝： | 10 X 10 MM, 1 MM HEIGHT, MS-026ACD, TQFP-64 |
| 文件頁數(shù)： | 9/34頁 |
| 文件大?。?/td> | 534K |
| 代理商： | ZL30101QDC |
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ZL30101
Data Sheet
9
Zarlink Semiconductor Inc.
43
C8/C32o
Clock 8.192 MHz or 32.768 MHz (Output).
This output is used for ST-BUS and GCI
operation at 8.192 Mbps or for operation with a 32.768 MHz clock. The output frequency
is selected via the OUT_SEL pin.
44
AV
DD
AV
DD
C2o
Positive Analog Supply Voltage.
+3.3 V
DC
nominal.
Positive Analog Supply Voltage.
+3.3 V
DC
nominal.
Clock 2.048 MHz (Output).
This output is used for standard E1 interface timing and for
ST-BUS operation at 2.048 Mbps.
45
46
This clock output pad includes a Schmitt input which serves as a PLL feedback path;
proper transmission-line termination should be applied to maintain reflections below
Schmitt trigger levels.
47
C16o
Clock 16.384 MHz (Output).
This output is used for ST-BUS operation with a
16.384 MHz clock.
This clock output pad includes a Schmitt input which serves as a PLL feedback path;
proper transmission-line termination should be applied to maintain reflections below
Schmitt trigger levels.
48
F8/F32o
Frame Pulse (Output).
This is an 8 kHz 122 ns active high framing pulse (OUT_SEL=0)
or it is an 8 kHz 31 ns active high framing pulse (OUT_SEL=1), which marks the
beginning of a frame.
This clock output pad includes a Schmitt input which serves as a PLL feedback path;
proper transmission-line termination should be applied to maintain reflections below
Schmitt trigger levels.
49
F4/F65o
Frame Pulse ST-BUS 2.048 Mbps or ST-BUS at 65.536 MHz clock (Output).
This
output is an 8 kHz 244 ns active low framing pulse (OUT_SEL=0), which marks the
beginning of an ST-BUS frame. This is typically used for ST-BUS operation at
2.048 Mbps and 4.096 Mbps. Or this output is an 8 kHz 15 ns active low framing pulse
(OUT_SEL=1), typically used for ST-BUS operation with a clock rate of 65.536 MHz.
50
F16o
Frame Pulse ST-BUS 8.192 Mbps (Output).
This is an 8 kHz 61 ns active low framing
pulse, which marks the beginning of an ST-BUS frame. This is typically used for ST-BUS
operation at 8.192 Mbps.
51
AGND
Analog Ground.
0 V
52
IC
Internal Connection.
Connect this pin to ground.
53
REF_SEL
Reference Select (Input)
. This input selects the input reference that is used for
synchronization, see Table 4 on page 19. This pin is internally pulled down to GND.
54
NC
No internal bonding Connection.
Leave unconnected.
55
REF0
Reference (Input).
This is one of two (REF0, REF1) input reference sources used for
synchronization. One of five possible frequencies may be used: 8 kHz, 1.544 MHz,
2.048 MHz, 8.192 MHz or 16.384 MHz. This pin is internally pulled down to GND.
56
NC
No internal bonding Connection.
Leave unconnected.
57
REF1
Reference (Input).
See REF0 pin description.
58
NC
No internal bonding Connection.
Leave unconnected.
Pin Description (continued)
Pin #
Name
Description
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| ZL30102QDG1 | T1/E1 Stratum 4/4E Redundant System Clock Synchronizer for DS1/E1 and H.110 |
| ZL30102 | T1/E1 Stratum 4/4E Redundant System Clock Synchronizer for DS1/E1 and H.110 |
| ZL30102QDG | T1/E1 Stratum 4/4E Redundant System Clock Synchronizer for DS1/E1 and H.110 |
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| ZL30105 | Power Clamp On Multimeter; DMM Type:Clamp; No. of Digits/Alpha:3-3/4; DMM Response Type:True RMS; Approval Categories:CAT III 600V; Calibrated:No; Current Measuring Range:0-400.0A; Current Setting AC:400A RoHS Compliant: NA |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ZL30101QDG1 | 制造商:Microsemi Corporation 功能描述:SYS SYNCHRONIZER 64TQFP - Trays |
| ZL30102 | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:T1/E1 Stratum 4/4E Redundant System Clock Synchronizer for DS1/E1 and H.110 |
| ZL30102_05 | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:T1/E1 Stratum 4/4E Redundant System Clock Synchronizer for DS1/E1 and H.110 |
| ZL30102QDG | 制造商:Zarlink Semiconductor Inc 功能描述:PLL CLOCK SYNTHESIZER SGL 64TQFP - Trays |
| ZL30102QDG1 | 制造商:Microsemi Corporation 功能描述:PB FREE T1/E1 SYSTEM SYNCHRONIZER - Trays 制造商:Zarlink Semiconductor Inc 功能描述:PB FREE T1/E1 SYSTEM SYNCHRONIZER - Trays |
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