參數(shù)資料
型號(hào)： ZL10311DTV-SOC
廠商： Zarlink Semiconductor Inc.
英文描述： Digital Television DVB-T-On-a-Chip Processor
中文描述： 數(shù)字電視的DVB - T -上一芯片處理器
文件頁(yè)數(shù)： 5/40頁(yè)
文件大?。?/td> 670K
代理商： ZL10311DTV-SOC
Data Sheet
ZL10310/ZL10311
5
Zarlink Semiconductor Inc.
Figure 2 - Block diagram of a typical ZL10310-based Free to Air TV Adaptor
3.0 Typical Digital Television (DTV) Receiver
Figure 2 shows a typical Free to Air TV receiver block diagram employing a ZL10310 DTV-SoC device. In its
minimal configuration, the ZL10310 DTV-SoC device only requires a single 64 Mbit SDRAM, an audio DAC, and a
Flash ROM, which are in addition to a DVB-T tuner front end and a 10-bit analog to digital converter.
The Terrestrial Tuner section performs an independent down conversion of the received DVB-T signal from the
Antenna, to an IF frequency in the range of 30MHz to 57MHz, dependent on television system (typically 36.17MHz
Center Frequency, with
±
4MHz span). The analogue IF is then converted to the digital domain, with a 10-bit ADC,
clocked at 20.48MHz and the resulting Digital output is centered on 15.69MHz. This Digital signal is applied to the
ZL10310 via the ADC_IN[9:0] input pins, in the form of a 10-bit parallel signal.
The ZL10310 converts the digitized IF from a Terrestrial TV Tuner into an MPEG-2 Transport Stream, which can be
optionally de-scrambled (if CA scrambling is used by the broadcaster), and de-multiplexed into separate Packetised
Elementary Streams (PES), which are routed to the MPEG Audio and Video decoders, and SI data to the PowerPC
405
TM
subsystem.
Decoded Video can then be mixed and optionally scaled with On-Screen Display (OSD) Graphics generated by the
DTV application software. The resultant combination of video and graphics are then routed to the PAL/NTSC Digital
ENCoders (DENCs) for display on the TV via the on-chip 10-bit video DACs.
Decoded Audio is output directly from the audio decoder sub-system to the I
2
S and S/PDIF (Sony/Philips Digital
InterFace) outputs.
ZL10310
DTV-SOC
Comp Video
Analog Video
RGB or Y U/V
Digital Audio
(I S)
D
A
C
Analog Audio
Aux Bus
Aux
Bus
8MB
FLASH
External
Peripherals
SDRAM
SDRAM1
Bus
E
27MHz
VCXO
CLK
27IN
20.48MHz
Crystal
Oscillator
COFDM
Clock
Terrestrial
Tuner
ADCIN
AGC B
ADCCLK
A
D
C
20.48MHz
Bitstream o/ps
Bitstream i/ps
Common
Interface
Tuner Control
Serial
EEPROM
InfraRed Sensor
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ZL10312QCF Satellite Demodulator
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ZL10311GAC 制造商:ZARLINK 制造商全稱(chēng):Zarlink Semiconductor Inc 功能描述:Digital Television DVB-T-On-a-Chip Processor
ZL10312 制造商:ZARLINK 制造商全稱(chēng):Zarlink Semiconductor Inc 功能描述:Satellite Demodulator
ZL10312QCF 制造商:ZARLINK 制造商全稱(chēng):Zarlink Semiconductor Inc 功能描述:Satellite Demodulator
ZL10312QCG 制造商:Microsemi Corporation 功能描述:
ZL10312QCG1 制造商:ZARLINK 制造商全稱(chēng):Zarlink Semiconductor Inc 功能描述:Satellite Demodulator
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