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參數(shù)資料
| 型號(hào)： | Z8018520FSC |
| 廠商： | ZILOG INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | SMART PERIPHERAL CONTROLLERS |
| 中文描述： | MICROCONTROLLER, PQFP100 |
| 封裝： | PLASTIC, QFP-100 |
| 文件頁(yè)數(shù)： | 84/95頁(yè) |
| 文件大?。?/td> | 484K |
| 代理商： | Z8018520FSC |
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84
P R E L I M I N A R Y
Z80185/Z80195
S
MART
P
ERIPHERAL
C
ONTROLLERS
DS971850301
Zilog
Wait State Generation (WSG)
The Memory Wait Insertion field of the DCNTL register
applies to all accesses to memory, and allows insertion of
0-3 wait states. In the Z80185, the WSG Chip Select
Register allows individual wait state control for the various
types and areas of memory.
1
1
1
1
1
1
1
1
Other Memory Wait Insertion
On-Chip ROM Wait Insertion
/ROMCS Wait Insertion
/RAMCS Wait Insertion
WSG Chip Select Register (I/O Address %D8)
7
6
5
4
3
2
1
0
Figure 86. WSG Chip Select Register
(I/O Address %D8)
Bits 7-6.
This field controls how many wait states are
inserted for accesses to external memory in which /RAMCS
is asserted: 00 = none, 01 = 1, 10 = 2, 11 = 4 wait states.
Bits 5-4.
This field controls how many wait states are
inserted for accesses to external memory in which /ROMCS
is asserted, and is encoded like bits 7-6.
Bits 3-2.
This field controls how many wait states are
inserted for accesses to on-chip ROM, and is encoded like
bits 7-6.
Note:
On-chip ROM should be fast enough to
support no-wait-state operation at the maximum specified
clock rate, but this field is included as a “hedge” against
difficulties in this area, as well as to provide timing compat-
ibility in unusual circumstances.
Bits 1-0.
This field controls how many wait states are
inserted for accesses to external memory in which neither
/RAMCS nor /ROMCS is asserted, and is encoded the
same as bits 7-6.
All fields in this register Reset to 11. The 4-wait-state
feature is included to allow the use of commodity DRAMs
with a clock rate at, or near, the maximum.
Note that this facility, and the one in the DCNTL register,
both logically OR into the WAIT signal, to allow this register
full control of wait states. Bits 7-6 of DCNTL should be
programmed to 00.
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| Z80195 | SMART PERIPHERAL CONTROLLERS |
| Z8019520FSC | SMART PERIPHERAL CONTROLLERS |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| Z8018533FSC | 制造商:ZILOG 制造商全稱:ZILOG 功能描述:SMART PERIPHERAL CONTROLLERS |
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| Z8018933ASC | 制造商:ZILOG 制造商全稱:ZILOG 功能描述:GENERAL-PURPOSE EMBEDDED CONTROLLERS |
| Z8018933FSC | 制造商:ZILOG 制造商全稱:ZILOG 功能描述:GENERAL-PURPOSE EMBEDDED CONTROLLERS |
| Z8018X | 制造商:ZILOG 制造商全稱:ZILOG 功能描述:Family MPU |
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