參數(shù)資料
型號: XRT86VL38_1
廠商: Exar Corporation
元件分類: 通信及網(wǎng)絡(luò)
英文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
中文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
文件頁數(shù): 52/66頁
文件大?。?/td> 425K
代理商: XRT86VL38_1
XRT86VL38
49
OCTAL T1/E1/J1 FRAMER/LIU COMBO - HARDWARE DESCRIPTION
REV. V1.2.0
BLAST
P23
M17
I
-
Last Cycle of Burst Indicator Input:
If the Microprocessor Interface is operating in the Intel-I960
Mode, then this input pin is used to indicate (to the Micro-
processor Interface block) that the current data transfer is
the last data transfer within the current burst operation.
The Microprocessor should assert this input pin (by tog-
gling it “Low”) in order to denote that the current READ or
WRITE operation (within a BURST operation) is the last
operation of this BURST operation.
N
OTES
:
1.
If the user has configured the Microprocessor
Interface to operate in the Intel-Asynchronous, the
Motorola-Asynchronous or the Power PC 403
Mode, then he/she should tie this input pin to
GND.
2.
This pin is internally pulled “High” with a 50k
Ω
resistor.
RESET
Y4
Y1
I
-
Hardware Reset Input
Reset is an active low input. If this pin is pulled “Low” for
more than 10
μ
S, the device will be reset. When this occurs,
all output will be ‘tri-stated’, and all internal registers will be
reset to their default values.
POWER SUPPLY PINS (3.3V)
S
IGNAL
N
AME
420 P
KG
B
ALL
#
484P
KG
B
ALL
#
T
YPE
D
ESCRIPTION
VDD
Y2
AC4
AC11
AE18
AD23
AA25
N26
F24
A25
C15
C8
G10
G12
G15
H17
L16
R17
T7
T9
T11
T13
T15
PWR
Framer Block Power Supply (I/O)
RVDD
D2
F2
H2
K2
M2
P2
T2
V2
E1
H5
K6
L6
M7
N4
R5
T5
PWR
Receiver Analog Power Supply for LIU Section
MICROPROCESSOR INTERFACE
S
IGNAL
N
AME
420 P
KG
B
ALL
#
484P
KG
B
ALL
#
T
YPE
O
UTPUT
D
RIVE
(
M
A)
D
ESCRIPTION
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