參數(shù)資料
型號(hào): XRT86VL30IV80-F
廠商: Exar Corporation
文件頁數(shù): 29/175頁
文件大?。?/td> 0K
描述: IC FRAMR/LIU T1/E1/J1 QD 80LQFP
標(biāo)準(zhǔn)包裝: 90
控制器類型: T1/E1/J1 調(diào)幀器,LIU
電源電壓: 3.3V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 80-LQFP
供應(yīng)商設(shè)備封裝: 80-LQFP(12x12)
包裝: 托盤
其它名稱: 1016-1486
XRT86VL30IV80-F-ND
XRT86VL30
119
SINGLE T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION
REV. 1.0.1
2
RxFULL_ENB
R/W
0
Receive Slip Buffer Full Interrupt Enable
This bit enables or disables the Receive Slip Buffer Full interrupt
within the XRT86VL30 device. Once this interrupt is enabled, the
Receive Slip Buffer Full interrupt is declared when the receive slip
buffer is filled. If the Receive slip buffer is full and a WRITE opera-
tion occurs, then a full frame of data will be deleted, and the interrupt
status bit will be set to ‘1’.
0 - Disables the Receive Slip Buffer Full interrupt when the Transmit
Slip Buffer fills
1 - Enables the Receive Slip Buffer Full interrupt when the Transmit
Slip Buffer fills.
1
RxEMPT_ENB
R/W
0
Receive Slip buffer Empty Interrupt Enable
This bit enables or disables the Receives Slip Buffer Empty interrupt
within the XRT86VL30 device. Once this interrupt is enabled, the
Receive Slip Buffer Empty interrupt is declared when the Receive
slip buffer is emptied. If the Receive slip buffer is emptied and a
READ operation occurs, then a full frame of data will be repeated,
and the interrupt status bit will be set to ‘1’.
0 - Disables the Receive Slip Buffer Empty interrupt when the Trans-
mit Slip Buffer empties
1 - Enables the Receive Slip Buffer Empty interrupt when the Trans-
mit Slip Buffer empties.
0
RxSLIP_ENB
R/W
0
Receive Slip buffer Slips Interrupt Enable
This bit enables or disables the Receive Slip Buffer Slips interrupt
within the XRT86VL30 device. Once this interrupt is enabled, the
Receive Slip Buffer Slips interrupt is declared when either the
Receive slip buffer is filled or emptied. If the Receive slip buffer is
emptied and a READ operation occurs, then a full frame of data will
be repeated, and the interrupt status bit will be set to ‘1’.
The interrupt status bit will be set to ‘1’ in either one of these two
conditions:
1. If the Receive slip buffer is emptied and a READ operation
occurs, then a full frame of data will be repeated, and this
interrupt bit will be set to ‘1’.
2. If the Receive slip buffer is full and a WRITE operation occurs,
then a full frame of data will be deleted, and this interrupt bit
will be set to ‘1’.
0 - Disables the Receive Slip Buffer Slips interrupt when the Trans-
mit Slip Buffer empties or fills
1 - Enables the Receive Slip Buffer Slips interrupt when the Trans-
mit Slip Buffer empties or fills.
TABLE 103: SLIP BUFFER INTERRUPT ENABLE REGISTER (SBIER)
HEX ADDRESS: 0X0B09
BIT
FUNCTION
TYPE
DEFAULT
DESCRIPTION-OPERATION
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