參數(shù)資料
型號: XRT86VL30IV80-F
廠商: Exar Corporation
文件頁數(shù): 19/175頁
文件大?。?/td> 0K
描述: IC FRAMR/LIU T1/E1/J1 QD 80LQFP
標(biāo)準(zhǔn)包裝: 90
控制器類型: T1/E1/J1 調(diào)幀器,LIU
電源電壓: 3.3V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 80-LQFP
供應(yīng)商設(shè)備封裝: 80-LQFP(12x12)
包裝: 托盤
其它名稱: 1016-1486
XRT86VL30IV80-F-ND
XRT86VL30
110
REV. 1.0.1
SINGLE T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION
1
SE_ENB
R/W
0
Synchronization Bit (CRC-6) Error Interrupt Enable
This bit permits the user to either enable or disable the “CRC-6 Error
Detection” Interrupt, within the XRT86VL30 device. If the user enables
this interrupt, then the Receive T1 Framer block will generate an inter-
rupt when it detects a CRC-6 error within the incoming T1 multiframe.
0 - Disables the “CRC-6 Error Detection” Interrupt.
1 - Enables the “CRC-6 Error Detection” Interrupt.
0
FE_ENB
R/W
0
Framing Bit Error Interrupt Enable
This bit permits the user to either enable or disable the “Framing Align-
ment Bit Error Detection” Interrupt, within the XRT86VL30 device. If the
user enables this interrupt, then the Receive T1 Framer block will gen-
erate an interrupt when it detects one or more Framing Alignment Bit
error within the incoming T1 data stream.
0 - Disables the “Framing Alignment Bit Error Detection” Interrupt.
1 - Enables the “Framing Alignment Bit Error Detection” Interrupt.
NOTE: Detecting Framing Alignment Bit Error doesn't not necessarily
indicate that synchronization has been lost.
TABLE 99: FRAMER INTERRUPT ENABLE REGISTER (FIER)
HEX ADDRESS: 0X0B05
BIT
FUNCTION
TYPE
DEFAULT
DESCRIPTION-OPERATION
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XRT86VL30IVF 制造商:Exar Corporation 功能描述:
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