TABLE
參數(shù)資料
型號: XRT86VL30IV80-F
廠商: Exar Corporation
文件頁數(shù): 123/175頁
文件大小: 0K
描述: IC FRAMR/LIU T1/E1/J1 QD 80LQFP
標準包裝: 90
控制器類型: T1/E1/J1 調(diào)幀器,LIU
電源電壓: 3.3V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 80-LQFP
供應商設備封裝: 80-LQFP(12x12)
包裝: 托盤
其它名稱: 1016-1486
XRT86VL30IV80-F-ND
XRT86VL30
46
REV. 1.0.1
SINGLE T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION
TABLE 32: BERT CONTROL & STATUS REGISTER (BERTCSR0)
HEX ADDRESS: 0X0121
BIT
FUNCTION
TYPE
DEFAULT
DESCRIPTION-OPERATION
7-4
Reserved
-
These bits are not used
3
BERT_Switch
R/W
0
BERT Switch
This bit enables or disables the BERT switch function within the
XRT86VL30 device.
By enabling the BERT switch function, BERT functionality will be
switched between the receive and transmit framer. T1 Receive
framer will generate the BERT pattern and insert it onto the receive
backplane interface, and T1 Transmit Framer will be monitoring the
transmit backplane interface for BERT pattern and declare BERT
LOCK if BERT has locked onto the input pattern.
If BERT switch is disabled, T1 Transmit framer will generate the
BERT pattern to the line interface and the receive framer will be
monitoring the line for BERT pattern and declare BERT LOCK if
BERT has locked onto the input pattern.
0 = Disables the BERT Switch Feature.
1 = Enables the BERT Switch Feature.
2
BER[1]
R/W
0
Bit Error Rate
This bit is used to insert BERT bit error at the rates presented at the
table below. The exact function of this bit depends on whether BERT
switch function is enabled or not. (bit 3 within this register).
If the BERT switch function is disabled, bit error will be inserted by
the T1 transmit framer out to the line interface if this bit is enabled.
If the BERT switch function is enabled, bit error will be inserted by
the T1 receive framer out to the receive backplane interface if this
bit is enabled.
1
BER[0]
R/W
0
BER[1:0]
BIT ERROR RATE
00/11
Disable Bit Error insertion to the transmit output
or receive backplane interface
01
Bit Error is inserted to the transmit output or
receive backplane interface at a rate of 1/1000
(one out of one Thousand)
10
Bit Error is inserted to the transmit output or
receive backplane interface at a rate of 1/
1,000,000 (one out of one million)
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相關代理商/技術參數(shù)
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