
XRT73LC03A
6
3 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
REV. 1.0.4
RECEIVE INTERFACE
PIN #NAME
TYPE
DESCRIPTION
49
111
43
RxClk_0
RxClk_1
RxClk_2
OReceive Clock Output - Channel (n):
This output pin is the Recovered Clock signal from the incoming line sig-
nal for Channel (n). The Receive Section of Channel (n) outputs data via
the RPOS_(n) and RNEG_(n) output pins on the rising edge of this clock
signal.
Configure the Receive Section of Channel (n) to update the data on the
RPOS_(n) and RNEG_(n) output pins on the falling edge of RxClk_(n)
by doing one of the following:
a. Operating in the Hardware Mode
Pull the RxClkINV pin to "High".
b. Operating in the HOST Mode
Write a "1" into the RxClkINV bit-field within the Command Register.
50
110
44
RNEG_0
RNEG_1
RNEG_2
O
Receive Negative Data Output - Channel (n):
This output pin pulses "High" whenever Channel (n) of the XRT73LC03A
has received a Negative Polarity pulse in the incoming line signal at the
RTIP_(n)/RRing_(n) inputs.
NOTE: If the Channel (n) B3ZS/HDB3 Decoder is enabled, then the zero
suppression patterns in the incoming line signal (such as: "00V", "000V",
"B0V", "B00V") is not reflected at this output.
51
109
45
RPOS_0
RPOS_1
RPOS_2
O
Receive Positive Data Output - Channel (n):
This output pin pulses “High" whenever Channel (n) of the XRT73LC03A
has received a Positive Polarity pulse in the incoming line signal at the
RTIP_(n)/RRing_(n) inputs.
NOTE: If the Channel (n) B3ZS/HDB3 Decoder is enabled, then the zero
suppression patterns in the incoming line signal (such as: "00V", "000V",
"B0V", "B00V") is not reflected at this output.
71
85
79
RRing_0
RRing_1
RRing_2
I
Receive Ring Input - Channel (n):
This input pin along with RTIP_(n) is used to receive the bipolar line sig-
nal from the Remote DS3/E3/STS-1 Terminal.
72
84
80
RTIP_0
RTIP_1
RTIP_2
I
Receive TIP Input - Channel (n):
This input pin along with RRing_(n) is used to receive the bipolar line sig-
nal from the Remote DS3/E3/STS-1 Terminal.
74
82
100
REQEN_0
REQEN_1
REQEN_2
I
Receive Equalization Enable Input - Channel (n):
Setting this input pin "High" enables the Internal Receive Equalizer
Equalizer. The guidelines for enabling and disabling the Receive Equal-
izer are described in Section 3.2.
NOTE: This pin is ignored and should be tied to GND if the XRT73LC03A
is going to be operating in the HOST Mode, (internally pulled-down).