3.4 THE HDB3/B3ZS D" />
參數(shù)資料
型號： XRT73LC03AIV-F
廠商： Exar Corporation
文件頁數(shù)： 45/61頁
文件大?。?/td> 0K
描述： IC LIU E3/DS3/STS-1 3CH 120LQFP
標(biāo)準(zhǔn)包裝： 72
類型： 線路接口裝置（LIU）
驅(qū)動器/接收器數(shù)： 3/3
規(guī)程： DS3，E3，STS-1
電源電壓： 3.135 V ~ 3.465 V
安裝類型： 表面貼裝
封裝/外殼： 120-LQFP
供應(yīng)商設(shè)備封裝： 120-LQFP（14x20）
包裝： 托盤
XRT73LC03A
II
REV. 1.0.4
3 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
3.4 THE HDB3/B3ZS DECODER ............................................................................................................................. 38
3.4.1 B3ZS Decoding (DS3/STS-1 Applications) .......................................................................................... 38
3.4.2 HDB3 Decoding (E3 Applications) ....................................................................................................... 38
3.4.3 Configuring the HDB3/B3ZS Decoder ................................................................................................. 39
COMMAND REGISTER CR2-(N) ...................................................................................................... 39
3.5 LOS DECLARATION/CLEARANCE ....................................................................................................................... 39
3.5.1 The LOS Declaration/Clearance Criteria for E3 Applications ............................................................... 40
3.5.2 The LOS Declaration/Clearance Criteria for DS3 and STS-1 Applications .......................................... 41
COMMAND REGISTER CR0-(N) ...................................................................................................... 42
COMMAND REGISTER CR2-(N) ...................................................................................................... 42
COMMAND REGISTER CR0-(N) ...................................................................................................... 42
COMMAND REGISTER CR2-(N) ...................................................................................................... 42
3.5.3 Muting the Recovered Data while the LOS is being Declared ............................................................. 42
COMMAND REGISTER CR3-(N) ...................................................................................................... 43
3.6 ROUTING THE RECOVERED TIMING AND DATA INFORMATION TO THE RECEIVING TERMINAL EQUIPMENT .............. 43
3.6.1 Routing Dual-Rail Format Data to the Receiving Terminal Equipment ................................................ 43
COMMAND REGISTER CR3-(N) ...................................................................................................... 45
3.6.2 Routing Single-Rail Format (Binary Data Stream) data to the Receive Terminal Equipment .............. 45
COMMAND REGISTER CR3-(N) ...................................................................................................... 45
3.7 SHUTTING OFF THE RECEIVE SECTION ............................................................................................................. 46
COMMAND REGISTER CR3-(N) ...................................................................................................... 46
4.0 Diagnostic Features of the XRT73LC03A ...................................................................................... 47
4.1 THE ANALOG LOCAL LOOP-BACK MODE ............................................................................................................ 47
COMMAND REGISTER CR4-(N) ...................................................................................................... 48
4.2 THE DIGITAL LOCAL LOOP-BACK MODE. ........................................................................................................... 48
COMMAND REGISTER CR4-(N) ...................................................................................................... 48
4.3 THE REMOTE LOOP-BACK MODE ...................................................................................................................... 49
COMMAND REGISTER CR4-(n) ...................................................................................................... 49
4.4 TXOFF FEATURES ........................................................................................................................................... 50
COMMAND REGISTER CR1-(N) ...................................................................................................... 50
4.5 THE TRANSMIT DRIVE MONITOR FEATURES ....................................................................................................... 50
4.6 THE TAOS (TRANSMIT ALL ONES) FEATURE .................................................................................................... 51
COMMAND REGISTER CR1-(N) ...................................................................................................... 51
5.0 The Microprocessor Serial Interface .............................................................................................. 51
5.1 DESCRIPTION OF THE COMMAND REGISTERS .................................................................................................... 51
5.2 DESCRIPTION OF BIT-FIELDS FOR EACH COMMAND REGISTER ........................................................................... 53
5.2.1 Command Register - CR0-(n) .............................................................................................................. 53
COMMAND REGISTER CR0-(N) ....................................................................................................... 53
COMMAND REGISTER CR1-(N) ...................................................................................................... 53
5.2.3 Command Register CR2-(n) ................................................................................................................ 54
COMMAND REGISTER CR2-(N) ...................................................................................................... 54
COMMAND REGISTER CR3-(N) ...................................................................................................... 54
COMMAND REGISTER CR4-(N) ...................................................................................................... 55
5.3 OPERATING THE MICROPROCESSOR SERIAL INTERFACE. ................................................................................... 56
ORDERING INFORMATION ............................................................................................. 58
PACKAGE DIMENSIONS ................................................................................................. 58
REVISION HISTORY ..................................................................................................................................... 59
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