- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄376461 > XRT73LC00AIV (EXAR CORP) E3/DS3/STS-1 LINE INTERFACE UNIT PDF資料下載
參數(shù)資料
| 型號： | XRT73LC00AIV |
| 廠商： | EXAR CORP |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | E3/DS3/STS-1 LINE INTERFACE UNIT |
| 中文描述： | DATACOM, PCM TRANSCEIVER, PQFP44 |
| 封裝： | 10 X 10 MM, 1.40 MM HEIGHT, TQFP-44 |
| 文件頁數(shù)： | 6/53頁 |
| 文件大小： | 376K |
| 代理商： | XRT73LC00AIV |
第1頁第2頁第3頁第4頁第5頁當前第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁
XRT73LC00A
E3/DS3/STS-1 LINE INTERFACE UNIT
REV. P1.0.0
xr
PRELIMINARY
3
PIN DESCRIPTION
PIN DESCRIPTION
P
IN
#
S
YMBOL
T
YPE
D
ESCRIPTION
1
TXLEV
I
Transmit Line Build-Out Enable/Disable Select:
This input pin is used to enable or disable the Transmit Line Build-Out circuit in
the XRT73LC00A.
Setting this pin to “High” disables the Line Build-Out circuit. In this mode, the
XRT73LC00A outputs partially shaped pulses onto the line via the TTIP and
TRING output pins.
Setting this pin to “Low” enables the Line Build-Out circuit. In this mode, the
XRT73LC00A outputs partially-shaped pulses onto the line via the TTIP and
TRING output pins.
To comply with the isolated DSX-3/STSX-1 Pulse Template Requirements per
Bellcore GR-499-Core or Bellcore GR-253-Core:
1. Set this input pin to a "1" if the cable length between the Cross-Connect and
the transmit output of the XRT73LC00A is greater than 225 feet.
2. Set this input pin to a "0" if the cable length between the Cross-Connect and
the transmit output of the XRT73LC00A is less than 225 feet.
This pin is active only if both of the following are true:
(a) The XRT73LC00A is configured to operate in either the DS3 or SONET
STS-1 modes and
(b) The XRT73LC00A is configured to operate in the Hardware Mode.
N
OTE
:
This pin should be tied to GND if the XRT73LC00A is to be operated in
the HOST mode.
2
TAOS
I
Transmit All Ones Select:
A “High” on this pin causes a continuous AMI all “1’s” pattern to be transmitted
onto the line. The frequency of this “1’s” pattern is determined by TCLK.
N
OTES
:
1. This input pin is ignored if the XRT73LC00A is operating in the HOST
Mode.
2. Tie this pin to GND if the XRT73LC00A is going to be operating in the
HOST Mode.
3
TxAVDD
****
Transmit Analog Power Supply
4
DMO
O
Drive Monitor Output:
If no bipolar line signal is detected on the TTIP/TRING output pins via the MTIP
and MRING input pins for 128±32 TCLK periods, then the DMO output pin tog-
gles and remains “High” until the next bipolar pulse is detected.
5
TxAGND
****
Transmit Analog Ground
6
AGND
****
Analog Ground (Substrate)
7
RxAGND
****
Receive Analog Ground
8
RTIP
I
Receive TIP Input:
This input pin along with RRING is used to receive the line signal from the
Remote DS3/E3/STS-1 Terminal.
9
RRING
I
Receive RING Input:
This input pin along with RTIP is used to receive the line signal from the Remote
DS3/E3/STS-1 Terminal.
相關PDF資料 |
PDF描述 |
|---|---|
| XRT73LC03A | 3 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT |
| XRT73LC03AIV | 3 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT |
| XRT73LC04A | 4 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT |
| XRT73LC04AIV | 4 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT |
| XRT73R06 | SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| XRT73LC00AIV-F | 功能描述:外圍驅(qū)動器與原件 - PCI 1-Ch DS3, E3, SONET RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| XRT73LC00AIVTR | 功能描述:網(wǎng)絡控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| XRT73LC00AIVTR-F | 功能描述:網(wǎng)絡控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| XRT73LC00IV | 制造商:EXAR 制造商全稱:EXAR 功能描述:E3/DS3/STS-1 LINE INTERFACE UNIT |
| XRT73LC03A | 制造商:EXAR 制造商全稱:EXAR 功能描述:3 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT |
發(fā)布緊急采購，3分鐘左右您將得到回復。