參數(shù)資料
型號(hào)： XRT73LC00AIV
廠商： EXAR CORP
元件分類： 數(shù)字傳輸電路
英文描述： E3/DS3/STS-1 LINE INTERFACE UNIT
中文描述： DATACOM, PCM TRANSCEIVER, PQFP44
封裝： 10 X 10 MM, 1.40 MM HEIGHT, TQFP-44
文件頁(yè)數(shù)： 28/53頁(yè)
文件大?。?/td> 376K
代理商： XRT73LC00AIV
XRT73LC00A
E3/DS3/STS-1 LINE INTERFACE UNIT
REV. P1.0.0
xr
PRELIMINARY
25
2.3.3
Encoder
The XRT73LC00A allows two methods to enable or
disable the HDB3/B3ZS Encoder.
If the XRT73LC00A is operating in the Hardware
Mode.
To enable the HDB3/B3ZS Encoder, set the ENDEC-
DIS input pin (pin 21) to “0”. To disable the HDB3/
B3ZS Encoder, set the ENDECDIS input pin (pin 21)
to “1”.
If the XRT73LC00A is operating in the HOST
Mode.
To enable the HDB3/B3ZS Encoder, set the ENDEC-
DIS bit-field in Command Register (CR2) to “0”.
Enabling/Disabling the HDB3/B3ZS
To disable the HDB3/B3ZS Encoder, set the ENDEC-
DIS bit-field in Command Register (CR2) to “1”.
If either of these two methods is employed to disable
the HDB3/B3ZS Encoder, the LIU transmits the data
onto the line as it is received via the TPDATA and
TNDATA input pins.
2.4
T
HE
T
RANSMIT
P
ULSE
S
HAPER
C
IRCUITRY
The Transmit Pulse Shaper Circuitry consists of a
Transmit Line Build-Out circuit which can be enabled
or disabled by setting the TXLEV input pin or bit-field
to “High” or “Low”. The purpose of the Transmit Line
Build-Out circuit is to permit configuring of the
XRT73LC00A to transmit an output pulse which is
compliant to either of the following Bellcore pulse
template requirements when measured at the Digital
Cross Connect System. Each of these Bellcore spec-
ifications further state that the cable length between
the Transmit Output and the Digital Cross Connect
system can range anywhere from 0 to 450 feet.
The Isolated DSX-3 Pulse Template Requirement per
Bellcore GR-499-CORE is illustrated in Figure 7.
The Isolated STSX-1 Pulse Template Requirement
per Bellcore GR-253-CORE is illustrated in Figure 8.
2.4.1
Enabling the Transmit Line Build-Out Cir-
cuit
If the Transmit Line Build-Out Circuit is enabled, the
XRT73LC00A outputs shaped pulses onto the line via
the TTIP and TRING output pins.
Do the following to enable the Transmit Line Build-Out
circuit in the XRT73LC00A:
If the XRT73LC00A is operating in the Hardware
Mode, set theTXLEV input pin (pin 1) to “Low”
If the XRT73LC00A is operating in the HOST Mode,
set the TXLEV bit-field to “0” as illustrated below.
COMMAND REGISTER CR2 (ADDRESS = 0X02)
D4
D3
D2
D1
D0
Reserved ENDECDIS ALOSDIS DLOSDIS REQDIS
X
0
X
X
X
COMMAND REGISTER CR1 (ADDRESS = 0X01)
D4
D3
D2
D1
D0
TXOFF
TAOS
TXCLKINV
TXLEV
TXBIN
0
X
X
0
X
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XRT73LC00AIV-F 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI 1-Ch DS3, E3, SONET RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
XRT73LC00AIVTR 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
XRT73LC00AIVTR-F 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
XRT73LC00IV 制造商:EXAR 制造商全稱:EXAR 功能描述:E3/DS3/STS-1 LINE INTERFACE UNIT
XRT73LC03A 制造商:EXAR 制造商全稱:EXAR 功能描述:3 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
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