參數(shù)資料
型號: XRT73LC00AIV-F
廠商: Exar Corporation
文件頁數(shù): 61/61頁
文件大?。?/td> 0K
描述: IC LIU STS1/DS3/E3 SGL 44TQFP
標(biāo)準(zhǔn)包裝: 160
類型: 線路接口裝置(LIU)
驅(qū)動器/接收器數(shù): 1/1
規(guī)程: DS3,E3,STS-1
電源電壓: 3.135 V ~ 3.465 V
安裝類型: 表面貼裝
封裝/外殼: 44-LQFP
供應(yīng)商設(shè)備封裝: 44-TQFP(10x10)
包裝: 托盤
XRT73LC00A
6
REV. 1.0.2
E3/DS3/STS-1 LINE INTERFACE UNIT
15
RLB
I
Remote Loop-Back Select:
This input pin along with LLB dictates which Loop-Back mode the XRT73LC00A
is operating in.
A “High” on this pin with LLB being set to “Low” configures the XRT73LC00A to
operate in the Remote Loop-Back Mode.
A “High” on this pin with LLB also being set to “High” configures the
XRT73LC00A to operate in the Digital Local Loop-Back Mode.
NOTES:
1.
This input pin is ignored if the XRT73LC00A is operating in the HOST
Mode.
2.
Tie this pin to GND if the XRT73LC00A is going to be operating in the
HOST Mode.
16
STS-1/DS3
I
STS-1/DS3 Select Input:
A “High” on this pin configures the Clock Recovery Phase Locked Loop to set its
VCO Center frequency to around 51.84 MHz for SONET STS-1 operations. A
“Low” on this pin configures the Clock Recovery Phase Locked Loop to set its
VCO Center frequency to around 44.736 MHz for DS3 operations.
NOTES:
1.
The XRT73LC00A ignores this pin if the E3 pin (pin 17) is set to “1”.
2.
This input pin is ignored if the XRT73LC00A is operating in the HOST
Mode.
3.
Tie this pin to GND if the XRT73LC00A is going to be operating in the
HOST Mode.
17
E3
I
E3 Select Input:
A “High” on this pin configures the XRT73LC00A to operate in the E3 Mode.
A “Low” on this pin configures the XRT73LC00A to check the state of the STS-1/
DS3 input pin.
NOTES:
1.
This input pin is ignored if the XRT73LC00A is operating in the HOST
Mode.
2.
Tie this pin to GND if the XRT73LC00A is going to be operating in the
HOST Mode.
18
HOST/HW
I
HOST/HW Mode Select:
This input pin is used to enable or disable the Microprocessor Serial Interface
(e.g., consisting of the SDI, SDO, SCLK, CS and REGRESET pins).
Setting this input pin “High” enables the Microprocessor Serial Interface (e.g.
configures the XRT73LC00A to operate in the HOST Mode). In this mode, the
XRT73LC00A is configured by writing data into the on-chip Command Registers
via the Microprocessor Serial Interface. When the XRT73LC00A is operating in
the HOST Mode, it ignores the states of many of the discrete input pins.
Setting this input pin “Low” disables the Microprocessor Serial Interface (e.g.,
configures the XRT73LC00A to operate in the Hardware Mode). In this mode,
many of the external input control pins are functional.
PIN DESCRIPTION
PIN #SYMBOL
TYPE
DESCRIPTION
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