參數(shù)資料
型號: XRT73LC00AIV-F
廠商: Exar Corporation
文件頁數(shù): 29/61頁
文件大?。?/td> 0K
描述: IC LIU STS1/DS3/E3 SGL 44TQFP
標準包裝: 160
類型: 線路接口裝置(LIU)
驅動器/接收器數(shù): 1/1
規(guī)程: DS3,E3,STS-1
電源電壓: 3.135 V ~ 3.465 V
安裝類型: 表面貼裝
封裝/外殼: 44-LQFP
供應商設備封裝: 44-TQFP(10x10)
包裝: 托盤
XRT73LC00A
32
REV. 1.0.2
E3/DS3/STS-1 LINE INTERFACE UNIT
3.0
THE RECEIVE SECTION
Figure 1 indicates that the XRT73LC00A Receive Section consists of the following blocks:
AGC/Equalizer
Peak Detector
Slicer
Clock Recovery PLL
Data Recovery
HDB3/B3ZS Decoder
The purpose of the XRT73LC00A Receive Section is to take an incoming attenuated/distorted bipolar signal
from the line and encode it back into the TTL/CMOS format where it can be received and processed by digital
circuitry in the Terminal Equipment.
3.1
Interfacing the Receive Section of the XRT73LC00A to the Line
By design, the Receive Section of the XRT73LC00A can be transformer-coupled or capacitive-coupled to the
line.
The specification documents for E3, DS3 and STS-1 all specify 75Ohm termination loads when
transmitting over coaxial cable. It is recommended to interface the Receive Section of the XRT73LC00A to the
line as shown in Figure 17 or Figure 18.
FIGURE 17. RECOMMENDED SCHEMATIC FOR INTERFACING THE RECEIVE SECTION OF THE XRT73LC00A TO THE
LINE (TRANSFORMER-COUPLING)
BNC
1:1
R1
37.4
R2
37.4
RTIP
RRING
C1
0.01uf
RPOS
RNEG
RCLK1
RLOS
RLOL
RxLOS
RxLOL
RxPOS
RxNEG
RxLineClk
T2
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