參數(shù)資料
型號(hào): XRT73LC00AIV-F
廠(chǎng)商: Exar Corporation
文件頁(yè)數(shù): 46/61頁(yè)
文件大小: 0K
描述: IC LIU STS1/DS3/E3 SGL 44TQFP
標(biāo)準(zhǔn)包裝: 160
類(lèi)型: 線(xiàn)路接口裝置(LIU)
驅(qū)動(dòng)器/接收器數(shù): 1/1
規(guī)程: DS3,E3,STS-1
電源電壓: 3.135 V ~ 3.465 V
安裝類(lèi)型: 表面貼裝
封裝/外殼: 44-LQFP
供應(yīng)商設(shè)備封裝: 44-TQFP(10x10)
包裝: 托盤(pán)
XRT73LC00A
47
E3/DS3/STS-1 LINE INTERFACE UNIT
REV. 1.0.2
point, this data is routed through the remainder of the Transmit Section of the XRT73LC00A and transmitted
out onto the line via the TTIP and TRING output pins.
Figure 31 illustrates the path that the data takes in the XRT73LC00A when the chip is configured to operate in
the Remote Loop-Back Mode.
During Remote Loop-Back operation, any data which is inputted via the RTIP and RRING input pins is also
outputted to the Terminal Equipment via the RPOS, RNEG and RCLK output pins.
The XRT73LC00A can be configured to operate in the Remote Loop-Back Mode by employing either one of
the following two steps
If the XRT73LC00A is operating in the HOST Mode:
Access the Microprocessor Serial Interface and write a “1” into the RLB bit-field and a “0” in the LLB bit-field in
Command Register CR4.
If the XRT73LC00A is operating in the Hardware Mode:
Set the RLB input pin (pin 15) to “High” and the LLB input pin (pin 16) to “Low”.
4.4
TXOFF Features
The XRT73LC00A allows the Transmit Driver in the Transmit Section of the chip to be shut off. This feature
can be advantageous for system redundancy conditions or during diagnostic testing. This feature can be
activated by either of the following ways.
When the XRT73LC00A is operating in the Hardware Mode
FIGURE 31. THE REMOTE LOOP-BACK PATH IN THE XRT73LC00A
COMMAND REGISTER CR4 (ADDRESS = 0X04)
D4
D3
D2
D1
D0
X
STS-1/DS3
E3
LLB
RLB
X
0
1
AGC/
Equalizer
Peak
Detector
LOS Detector
Slicer
Clock
Recovery
Data
Recovery
Invert
Loop MUX
HDB3/
B3ZS
Decoder
LOSTHR
SDI
SDO/LCV
SCLK
CS
REGRESET
RTIP
RRING
REQDIS
RCLK1
RCLK2/LCV
RPOS
RNEG
DR/SR
RLOS
LLB
RLB
ENDECDIS
TAOS
TPDATA
TNDATA
TCLK
RLOL EXCLK
Device
Monitor
MTIP
MRING
Transmit
Logic
Duty Cycle Adjust
TXLEV
TXOFF
DMO
TTIP
TRING
Pulse
Shaping
HDB3/
B3ZS
Encoder
Serial
Processor
Interface
Remote
Loop-Back Path
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