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參數(shù)資料
| 型號： | XRT73LC00AIV-F |
| 廠商： | Exar Corporation |
| 文件頁數(shù)： | 20/61頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC LIU STS1/DS3/E3 SGL 44TQFP |
| 標準包裝： | 160 |
| 類型： | 線路接口裝置（LIU） |
| 驅(qū)動器/接收器數(shù)： | 1/1 |
| 規(guī)程： | DS3，E3，STS-1 |
| 電源電壓： | 3.135 V ~ 3.465 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 44-LQFP |
| 供應(yīng)商設(shè)備封裝： | 44-TQFP（10x10） |
| 包裝： | 托盤 |
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XRT73LC00A
24
REV. 1.0.2
E3/DS3/STS-1 LINE INTERFACE UNIT
The results of making these selections are:
1. The VCO Center Frequency of the Clock Recovery Phase-Locked-Loop is configured to match the
selected data rate.
2. The B3ZS/HDB3 Encoder and Decoder blocks are configured to support B3ZS Encoding/Decoding if the
DS3 or STS-1 data rates were selected or,
3. The B3ZS/HDB3 Encoder and Decoder blocks are configured to support HDB3 Encoding/Decoding if the
E3 data rate was selected.
4. The on-chip Pulse-Shaping circuitry is configured to generate Transmit Output pulses of the correct shape
and width to meet the applicable pulse template requirement.
5. The LOS Declaration/Clearance Criteria is established.
2.0
THE TRANSMIT SECTION
Figure 1 indicates that the Transmit Section of the XRT73LC00A consists of the following blocks:
Transmit Logic Block
Duty Cycle Adjust Block
HDB3/B3ZS Encoder
Pulse Shaping Block
The purpose of the Transmit Section in the XRT73LC00A is to take TTL/CMOS level data from the terminal
equipment and encode it into a format that can:
1. be efficiently transmitted over coaxial cable at E3, DS3 or STS-1 data rates.
2. be reliably received by the Remote Terminal at the other end of the E3, DS3 or STS-1 data link.
3. comply with the applicable pulse template requirements.
2.1
The Transmit Logic Block
The purpose of the Transmit Logic Block is to accept either Dual-Rail or Single-Rail (a binary data stream) TTL/
CMOS level data and timing information from the Terminal Equipment.
Accepting Dual-Rail Data from the Terminal Equipment
The XRT73LC00A accepts Dual-Rail data from the Terminal Equipment via the following input signals:
TPDATA
TNDATA
TCLK
TABLE 3: SELECTING THE DATA RATE FOR THE
XRT73LC00A VIA THE STS-1/DS3 AND THE E3 BIT-
FIELDS
WITHIN COMMAND REGISTER CR4 (HOST
MODE)
SELECTED DATA RATE
STS-1/DS3
E3
E3
Don't Care
1
DS3
0
STS-1
1
0
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XRT73LC00AIVTR | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| XRT73LC00AIVTR-F | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| XRT73LC00IV | 制造商:EXAR 制造商全稱:EXAR 功能描述:E3/DS3/STS-1 LINE INTERFACE UNIT |
| XRT73LC03A | 制造商:EXAR 制造商全稱:EXAR 功能描述:3 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT |
| XRT73LC03A_08 | 制造商:EXAR 制造商全稱:EXAR 功能描述:3 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT |
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