參數(shù)資料
型號: XRT16L2552
廠商: Exar Corporation
英文描述: 2.25V TO 5.5V DUART WITH 16-BYTE FIFO
中文描述: 2.25V至5.5V的杜阿爾特16字節(jié)FIFO
文件頁數(shù): 14/47頁
文件大?。?/td> 413K
代理商: XRT16L2552
XR16L2552
2.25V TO 5.5V DUART WITH 16-BYTE FIFO
xr
REV. 1.1.1
14
.
F
IGURE
9. R
ECEIVER
O
PERATION
IN
NON
-FIFO M
ODE
F
IGURE
10. R
ECEIVER
O
PERATION
IN
FIFO
AND
A
UTO
RTS F
LOW
C
ONTROL
M
ODE
Receive Data Shift
Register (RSR)
Receive
Data Byte
and Errors
RHR Interrupt (ISR bit-2)
Receive Data
Holding Register
(RHR)
RXFIFO1
16X Clock
Receive Data Characters
Data Bit
Validation
Error
Tags in
LSR bits
4:2
Receive Data Shift
Register (RSR)
RXFIFO1
16X Clock
E
(
E
L
16 bytes by 11-bit
wide
FIFO
Receive Data Characters
FIFO Trigger=8
Example
:
- RX FIFO trigger level selected at 8 bytes
Data fills to 14
Data falls to 4
Data Bit
Validation
Receive
Data FIFO
Receive
Data
Receive Data
Byte and Errors
RHR Interrupt (ISR bit-2) programmed for
desired FIFO trigger level.
FIFO is Enabled by FCR bit-0=1
RTS# de-asserts when data fills above the flow
control trigger level to suspend remote transmitter.
Enable by EFR bit-6=1, MCR bit-2.
RTS# re-asserts when data falls below the flow
control trigger level to restart remote transmitter.
Enable by EFR bit-6=1, MCR bit-2.
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