參數(shù)資料
型號: XRP7740ILBTR-F
廠商: Exar Corporation
文件頁數(shù): 25/28頁
文件大?。?/td> 1610K
描述: IC REG 5OUT BCK/LINEAR 40TQFN
產(chǎn)品變化通告: Packing Change 15/Oct/2010
標準包裝: 3,000
系列: PowerXR
拓撲: 降壓(降壓)同步(4),線性(LDO)(1)
功能: 任何功能
輸出數(shù): 5
頻率 - 開關: 1.5MHz
電壓/電流 - 輸出 1: 控制器
電壓/電流 - 輸出 2: 控制器
電壓/電流 - 輸出 3: 控制器
帶 LED 驅(qū)動器:
帶監(jiān)控器:
帶序列發(fā)生器:
電源電壓: 6.5 V ~ 20 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 40-WFQFN 裸露焊盤
供應商設備封裝: 40-TQFN(6x6)
包裝: 帶卷 (TR)
配用: 1016-1352-ND - EVAL BOARD FOR XRP7740
1016-1344-ND - IN-SOCKET PROG BRD VIA USB/GUI
X
X
R
R
P
P
7
7
7
7
0
0
8
8
 
 
a
a
n
n
d
d
 
 
X
X
R
R
P
P
7
7
7
7
4
4
0
0
 
 
Q
Q
u
u
a
a
d
d
 
 
C
C
h
h
a
a
n
n
n
n
e
e
l
l
 
 
D
D
i
i
g
g
i
i
t
t
a
a
l
l
 
 
P
P
W
W
M
M
 
 
S
S
t
t
e
e
p
p
 
 
D
D
o
o
w
w
n
n
 
 
C
C
o
o
n
n
t
t
r
r
o
o
l
l
l
l
e
e
r
r
s
s
 
 
 
?2012 Exar Corporation
25/28
Rev. 1.2.2
I1 is the step load low current
Vos is output voltage including the overshoot
Vout is the steady state output voltage
Or it can be expressed approximately by
5 = 5? ?/DIV>
(5<
2
 5<
1
)
2
2 ?5I5\5b5a  5I
 
Here,
out
os
V
V
V

=
is the overshoot voltage deviation.
Select ESR such that output voltage ripple (Vrip) specification is met. There are two components in
Vrip. First component arises from the charge transferred to and from Cout during each cycle. The
second component of Vrip is due to the inductor ripple current flowing through the output
capacitors ESR. It can be calculated for Vrip:
55_5V5] = 5<5_5V5] ??85F5E
2
+ ?/DIV>
1
8 ?565\5b5a ?5S5`
?/DIV>
 
Where:
Irip is the inductor ripple current
fs is the switching frequency
Cout is the output capacitance
Note that a smaller inductor results in a higher Irip, therefore requiring a larger Cout and/or lower
ESR in order to meet Vrip.
"    Input Capacitor Selection
Select the input capacitor for Voltage, Capacitance, ripple current, ESR and ESL. Voltage rating is
nominally selected to be at least twice the input voltage. The RMS value of input capacitor current,
assuming a low inductor ripple current, can be approximated as:
55V5[ = 5<5\5b5a ??7 ?(1  57)
 
Where:
Iin is the RMS input current
Iout is the DC output current
D is the duty cycle
In general, the total input voltage ripple should be kept below 1.5% of VIN. The input voltage
ripple also has two major components: the voltage drop on the main capacitor
Cin
V     and  the 
voltage drop due to ESR -
ESR
V    . The contribution to Input voltage ripple by each term can be 
calculated from:
2
)
(
out
in
out
out
Cin
V
C
f
V
V
V
I
V

=
 
 
)
5
.
0
(
rip
out
ESR
I
I
ESR
V
+
?/DIV>
=
 
 
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