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參數(shù)資料
| 型號(hào)： | XRP7740ILBTR-F |
| 廠商： | Exar Corporation |
| 文件頁數(shù)： | 12/28頁 |
| 文件大?。?/td> | 1610K |
| 描述： | IC REG 5OUT BCK/LINEAR 40TQFN |
| 產(chǎn)品變化通告： | Packing Change 15/Oct/2010 |
| 標(biāo)準(zhǔn)包裝： | 3,000 |
| 系列： | PowerXR |
| 拓?fù)洌?/td> | 降壓（降壓）同步（4），線性（LDO）（1） |
| 功能： | 任何功能 |
| 輸出數(shù)： | 5 |
| 頻率 - 開關(guān)： | 1.5MHz |
| 電壓/電流 - 輸出 1： | 控制器 |
| 電壓/電流 - 輸出 2： | 控制器 |
| 電壓/電流 - 輸出 3： | 控制器 |
| 帶 LED 驅(qū)動(dòng)器： | 無 |
| 帶監(jiān)控器： | 無 |
| 帶序列發(fā)生器： | 是 |
| 電源電壓： | 6.5 V ~ 20 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 40-WFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 40-TQFN（6x6） |
| 包裝： | 帶卷 (TR) |
| 配用： | 1016-1352-ND - EVAL BOARD FOR XRP7740 1016-1344-ND - IN-SOCKET PROG BRD VIA USB/GUI |
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?2012 Exar Corporation
12/28
Rev. 1.2.2
FUNCTIONAL DESCRIPTION AND OPERATION
The XRP7708 and XRP7740 are quad-output digital pulse width modulation (DPWM) controllers with
integrated gate drivers for the use in synchronous buck switching regulators. Each output voltage
can be programmed from 0.9V to 5.1V without the need of an external voltage divider. The wide
range of the programmable DPWM switching frequency (from 300 kHz to 1.5 MHz) enables the user
to optimize for efficiency or component sizes. The digital regulation loop requires no external
passive components for network compensation. The loop performance does not need to be
compromised due to component tolerance, aging, and operating condition. Each digital controller
provides a number of safety features, such as over-current protection (OCP) and over-voltage
protection (OVP). The chip also provides over-temperature protection (OTP) and under-voltage
lock-out (UVLO) for two input voltage rails. The XRP7708/40 also has up to 6 GPIOs and a Standby
Linear Regulator to provide standby power. An I
2
C bus interface is provided to program the IC as
well as to communicate with the host for fault reporting and handling, power rail monitoring,
channel enable and disable, Standby Low Drop-out Regulator voltage reconfiguration, and Standby
LDO enable and disable.
The XRP7708 and XRP7740 offer a complete solution for soft-start and soft-stop. The delay and
ramp of each PWM regulator can be independently controlled. When a pre-bias voltage is present,
the device holds both high-side and low-side MOSFETs off until the reference voltage ramps up
higher than the output voltage. As a result, large negative inductor current and output voltage
disturbance are avoided. During soft-stop, the output voltage ramps down with a programmable
slope until it reaches a pre-set stop voltage. This pre-set value can be programmed between within
zero volts and the target voltage with the same set target voltage resolution (see shutdown
waveforms in Applications).
For brevity, only the XRP7708 will be referred to unless there is a specific difference between the
devices.
REGISTER TYPES
There are two types of registers in the XRP7708: read/write registers and read-only registers. The
read/write registers are used for the control functions of the IC and can be programmed using
configuration non-volatile memory (NVM) or through an I
2
C command. The read-only registers are
for feedback functions such as error/warning flags and for reading the output voltage or current.
NON-VOLATILE CONFIGURATION MEMORY
The non-volatile memory (NVM) in XRP7708 stores the configuration data for the chip and all of the
power rails. This memory is normally configured during manufacturing time. Once a specific bit of
the NVM is programmed, that bit can never be reprogrammed again [i.e. one-time programmable].
During chip power up, the contents in the NVM are automatically transferred to the internal
registers of the chip. Programmed cells have been verified to be permanent for at least 10 years
and are highly reliable.
POWER UP AND SEQUENCING REQUIREMENTS
The XRP7708 can be programmed to sequence its outputs for nearly any imaginable loading
requirement. However, there are some important sequencing requirements for the XRP7708 itself.
When power is applied to the XRP7708, the 5V VCCA and 1.8V AVDD regulators must come up and
stabilize to provide power for the analog and digital blocks of the IC. The Enable Pin must remain
below its logic level high threshold until the AVDD is regulating to ensure proper loading of the
configuration registers. For systems that control the Enable signal through a microcontroller or
other processor, this is simply a matter of providing the proper delay to the Enable signal after
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