參數資料
型號: XRP7740ILBTR-F
廠商: Exar Corporation
文件頁數: 22/28頁
文件大?。?/td> 1610K
描述: IC REG 5OUT BCK/LINEAR 40TQFN
產品變化通告: Packing Change 15/Oct/2010
標準包裝: 3,000
系列: PowerXR
拓撲: 降壓(降壓)同步(4),線性(LDO)(1)
功能: 任何功能
輸出數: 5
頻率 - 開關: 1.5MHz
電壓/電流 - 輸出 1: 控制器
電壓/電流 - 輸出 2: 控制器
電壓/電流 - 輸出 3: 控制器
帶 LED 驅動器:
帶監(jiān)控器:
帶序列發(fā)生器:
電源電壓: 6.5 V ~ 20 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 40-WFQFN 裸露焊盤
供應商設備封裝: 40-TQFN(6x6)
包裝: 帶卷 (TR)
配用: 1016-1352-ND - EVAL BOARD FOR XRP7740
1016-1344-ND - IN-SOCKET PROG BRD VIA USB/GUI
X
X
R
R
P
P
7
7
7
7
0
0
8
8
 
 
a
a
n
n
d
d
 
 
X
X
R
R
P
P
7
7
7
7
4
4
0
0
 
 
Q
Q
u
u
a
a
d
d
 
 
C
C
h
h
a
a
n
n
n
n
e
e
l
l
 
 
D
D
i
i
g
g
i
i
t
t
a
a
l
l
 
 
P
P
W
W
M
M
 
 
S
S
t
t
e
e
p
p
 
 
D
D
o
o
w
w
n
n
 
 
C
C
o
o
n
n
t
t
r
r
o
o
l
l
l
l
e
e
r
r
s
s
 
 
 
?2012 Exar Corporation
22/28
Rev. 1.2.2
External Clock Synchronization Master Slave combination
When an external clock is used, the user will need to setup the master to also have an external
clock in function. All of the same rules apply as in the External clock synchronization, Synchronized
operation as a Slave unit section of this document. There are two ways of synchronizing this,
either the external clock going to both Master/Slave CLK_IN, or CLK_IN can go to the Master, and
the Master can synchronize SYNC_OUT and CLK_OUT to the Slave.
GPIO2
GPIO2
XRP7708
Configured as a
master with
external clock sync
XRP7708
configured
as slave
SYNC_OUT
SYNC_IN
CLK_IN
CLK_IN
GPIO1
GPIO1
 
Fig. 24: External Clock Synchronization Master Slave Combination
 
GPIO2
GPIO2
XRP7708
Configured as a
master with
external clock sync
XRP7708
configured
as slave
SYNC_OUT
SYNC_IN
CLK_IN
CLK_IN
GPIO1
GPIO3
CLK_OUT
GPIO1
 
Fig. 258:Alternative External clock synchronization Master Slave combination
PHASE SHIFT
Each switching channel can be programmed to a phase shift of the multiples of 90 degrees [for a 4
phase configuration] or 120 degrees [for a 3 phase configuration]. Two or more of the channels
can use the same phase shift, however, it is preferable to run each channel at separate phases.
GPIO PINS
The General Purpose Input Output (GPIO) Pins are the basic interface between the XRP7708 and
the system. Although all of the stored data within the IC can be read back using the I
2
C bus it is
sometimes convenient to have some of those internal register to be displayed and or controlled by
a single data pin. Besides simple input output functions the GPIO pins can be configured to serve
as external clock inputs. These pins can be programmed using OTP bits or can be programmed
using the I
2
C bus. This GPIO_CONFIG register allows the user close to 100 different configuration
functions that the GPIO can be programmed to do.
NOTE: the GPIO Pins (and all I/Os) should NOT be driven without a 10K resistor when VIN is not
being applied to the IC.
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