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參數(shù)資料
| 型號： | XRP7740ILBTR-F |
| 廠商： | Exar Corporation |
| 文件頁數(shù)： | 20/28頁 |
| 文件大小： | 1610K |
| 描述： | IC REG 5OUT BCK/LINEAR 40TQFN |
| 產(chǎn)品變化通告： | Packing Change 15/Oct/2010 |
| 標準包裝： | 3,000 |
| 系列： | PowerXR |
| 拓撲： | 降壓（降壓）同步（4），線性（LDO）（1） |
| 功能： | 任何功能 |
| 輸出數(shù)： | 5 |
| 頻率 - 開關(guān)： | 1.5MHz |
| 電壓/電流 - 輸出 1： | 控制器 |
| 電壓/電流 - 輸出 2： | 控制器 |
| 電壓/電流 - 輸出 3： | 控制器 |
| 帶 LED 驅(qū)動器： | 無 |
| 帶監(jiān)控器： | 無 |
| 帶序列發(fā)生器： | 是 |
| 電源電壓： | 6.5 V ~ 20 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 40-WFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 40-TQFN（6x6） |
| 包裝： | 帶卷 (TR) |
| 配用： | 1016-1352-ND - EVAL BOARD FOR XRP7740 1016-1344-ND - IN-SOCKET PROG BRD VIA USB/GUI |
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?2012 Exar Corporation
20/28
Rev. 1.2.2
55V5[5V5Z5b5Z 575b5a5f 565f5P5Y5R% >
55\5b5a
55V5[5Z5N5e
Maximum Duty Cycle
The maximum duty cycle is dictated by the minimum required time to sample the current when the
low side MOSFET is on. For the XRP7708, the minimum required sampling time is about 16 clock
cycles at the main oscillator frequency. When calculating maximum duty cycle, the sampling time
needs to be subtracted using the below equation. For example, if operating at 1MHz using the
32MHz main oscillator frequency, the maximum duty cycle would be:
55N5e5V5Z5b5Z 575b5a5f 565f5P5Y5R% = ? (
16
55Y5\5P5X 5S5_5R5^5b5R5[5P5f
?5C5J5@ 5S5_5R5^5b5R5[5P5f 0.03)??100 H 47%
On the other hand, if the 48MHz main oscillator frequency was chosen for the 1MHz PWM
frequency, the maximum duty cycle would be:
55N5e5V5Z5b5Z 575b5a5f 565f5P5Y5R% = ? (
16
55Y5\5P5X 5S5_5R5^5b5R5[5P5f
?5C5J5@ 5S5_5R5^5b5R5[5P5f 0.03)??100 H 64%
Therefore, it is best to choose the highest main oscillator frequency for a particular PWM frequency
if duty cycle limit might be encountered. The maximum duty cycle for any PWM frequency can
easily be determined using the following table:
Main Oscillator Frequency
Maximum Duty Cycle
48MHz
44.8MHz
41.6MHz
38.4MHz
35.2MHz
32MHz
28.8Mhz
25.6MHz
1. MHz 1.4MHz 1. MHz 1.2MHz 1.1MHz 1. MHz
KHz
KHz
1. MHz
KHz
7KHz
KHz 7 KHz
7KHz
KHz
KHz
72
750KHz 700KHz 650KHz 600KHz 550KHz 500KHz 450KHz 400KHz
77
600KHZ 560KHz 520KHz 480KHz 440KHz 400KHz 360KHz 320KHz
500KHz 467KHZ 433KHz 400KHz 367KHz 333KHz 300KHz
NA
42 KHZ 4 KHZ
7 KHz
4 KHz
14KHz
NA
NA
NA
85%
375KHz 350KHz 325KHz 300KHz
NA
NA
NA
NA
Fig. 21: PWM Frequency
It is highly recommended that the maximum duty cycle obtained from the table above be
programmed into each of the channels using the SET_DUTY_LIMITER_CHx register. This ensures
that under all conditions (including faults), there will always be sufficient sampling time to measure
the output current. When the duty cycle limit is reached, the output voltage will no longer regulate
and will be clamped based on the maximum duty cycle limit setting.
Efficiency
The PWM Switching frequency plays an important role on overall power conversion efficiency. As
the switching frequency increase, the switching losses also increase. Please see the APPLICATION
INFORMATION, Typical Performance Data for further examples.
Component Selection and Frequency
Typically the components become smaller as the frequency increases, as long as the ripple
requirements remain constant. At higher frequency the inductor can be smaller in value and have a
smaller footprint while still maintaining the same current rating.
FREQUENCY SYNCHRONIZATION FUNCTION AND EXTERNAL CLOCK
The user of the XRP7708 can choose to use an external source as the primary clock for the
XRP7708. This function can be configured using the SET_SYNC_MODE_CONFIG register. This
register sets the operation of the XRP7708 when an external clock is required. By selecting the
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