參數(shù)資料
型號: XRM48L950PGET
廠商: Texas Instruments
文件頁數(shù): 41/176頁
文件大小: 0K
描述: MCU 16/32Bit FLASH 3MB 144LQFP
標準包裝: 1
系列: Hercules™ ARM® RM4x
應用: 工業(yè)安全,醫(yī)療
核心處理器: ARM? Cortex? - R4F
程序存儲器類型: 閃存(3MB)
控制器系列: RM4
RAM 容量: 256K x 8
接口: CAN,以太網(wǎng),I²C,LIN,MibSPI,SCI,SPI,USB
輸入/輸出數(shù): 64
電源電壓: 1.14 V ~ 3.6 V
工作溫度: -40°C ~ 105°C
安裝類型: 表面貼裝
封裝/外殼: 144-LQFP
包裝: 托盤
供應商設備封裝: 144-LQFP(20x20)
其它名稱: 296-29389
SPNS174A – APRIL 2012 – REVISED SEPTEMBER 2013
Table 5-11. Input Timing Requirements for the N2HET Input Capture Functionality
PARAMETER
MIN(1) (2)
MAX(1) (2)
UNIT
1
Input signal period, PCNT or WCAP for rising edge
2 (hr) (lr) tc(VCLK2) + 2
225 (hr) (lr) tc(VCLK2) - 2
ns
to rising edge
2
Input signal period, PCNT or WCAP for falling edge
2 (hr) (lr) tc(VCLK2) + 2
225 (hr) (lr) tc(VCLK2) - 2
ns
to falling edge
3
Input signal high phase, PCNT or WCAP for rising
(hr) (lr) tc(VCLK2) + 2
225 (hr) (lr) tc(VCLK2) - 2
ns
edge to falling edge
4
Input signal low phase, PCNT or WCAP for falling
(hr) (lr) tc(VCLK2) + 2
225 (hr) (lr) tc(VCLK2) - 2
ns
edge to rising edge
(1)
hr = High-resolution prescaler, configured using the HRPFC field of the Prescale Factor Register (HETPFR).
(2)
lr = Loop-resolution prescaler, configured using the LFPRC field of the Prescale Factor Register (HETPFR)
Both N2HET1 and N2HET2 have channels that are enhanced to be able to capture inputs with smaller
pulse widths than that specified in Table 5-11. See Table 5-13 for a list of which pins support small pulse
capture.
The input capture capability for these channels is specified in the following table.
Table 5-12. Input Timing Requirements for N2HET Channels with Enhanced Pulse Capture
PARAMETER
MIN
MAX
UNIT
1
Input signal period, PCNT or WCAP for rising edge
(hr) (lr) tc(VCLK2) + 2
225 (hr) (lr) tc(VCLK2) - 2
ns
to rising edge
2
Input signal period, PCNT or WCAP for falling edge
(hr) (lr) tc(VCLK2) + 2
225 (hr) (lr) tc(VCLK2) - 2
ns
to falling edge
3
Input signal high phase, PCNT or WCAP for rising
2 (hr) tc(VCLK2) + 2
225 (hr) (lr) tc(VCLK2) - 2
ns
edge to falling edge
4
Input signal low phase, PCNT or WCAP for falling
2 (hr) tc(VCLK2) + 2
225 (hr) (lr) tc(VCLK2) - 2
ns
edge to rising edge
Table 5-13. Input Capture Pin Capability
Channel
Supports 32-bit Capture
Enhanced Pulse Capture
N2HET1[00]
Yes
No
N2HET1[01]
Yes
No
N2HET1[02]
Yes
No
N2HET1[03]
Yes
No
N2HET1[04]
Yes
No
N2HET1[05]
Yes
No
N2HET1[06]
Yes
No
N2HET1[07]
Yes
No
N2HET1[08]
Yes
No
N2HET1[09]
Yes
No
N2HET1[10]
Yes
No
N2HET1[11]
Yes
No
N2HET1[12]
Yes
No
N2HET1[13]
Yes
No
N2HET1[14]
Yes
No
N2HET1[15]
Yes
N2HET1[16]
Yes
No
N2HET1[17]
Yes
No
N2HET1[18]
Yes
No
N2HET1[19]
Yes
No
N2HET1[20]
Yes
Copyright 2012–2013, Texas Instruments Incorporated
Peripheral Information and Electrical Specifications
135
Product Folder Links: RM48L950 RM48L750 RM48L550
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