參數(shù)資料
型號(hào): XRM48L950PGET
廠商: Texas Instruments
文件頁數(shù): 32/176頁
文件大?。?/td> 0K
描述: MCU 16/32Bit FLASH 3MB 144LQFP
標(biāo)準(zhǔn)包裝: 1
系列: Hercules™ ARM® RM4x
應(yīng)用: 工業(yè)安全,醫(yī)療
核心處理器: ARM? Cortex? - R4F
程序存儲(chǔ)器類型: 閃存(3MB)
控制器系列: RM4
RAM 容量: 256K x 8
接口: CAN,以太網(wǎng),I²C,LIN,MibSPI,SCI,SPI,USB
輸入/輸出數(shù): 64
電源電壓: 1.14 V ~ 3.6 V
工作溫度: -40°C ~ 105°C
安裝類型: 表面貼裝
封裝/外殼: 144-LQFP
包裝: 托盤
供應(yīng)商設(shè)備封裝: 144-LQFP(20x20)
其它名稱: 296-29389
SPNS174A – APRIL 2012 – REVISED SEPTEMBER 2013
5.2.3
ADC Electrical and Timing Specifications
Table 5-7. MibADC Recommended Operating Conditions
Parameter
MIN
MAX
Unit
ADREFHI
A-to-D high-voltage reference source
ADREFLO
VCCAD
V
ADREFLO
A-to-D low-voltage reference source
VSSAD
ADREFHI
V
VAI
Analog input voltage
ADREFLO
ADREFHI
V
IAIC
Analog input clamp current
- 2
2
mA
(VAI < VSSAD – 0.3 or VAI > VCCAD + 0.3)
Table 5-8. MibADC Electrical Characteristics Over Full Ranges of Recommended Operating Conditions
Parameter
Description/Conditions
MIN
Nom
MAX
Unit
Rmux
Analog input mux on-
250
Ω
resistance
Rsamp
ADC sample switch on-
250
Ω
resistance
Cmux
Input mux capacitance
16
pF
Csamp
ADC sample capacitance
13
pF
IAIL
Analog off-state input
VCCAD = 3.6V
VSSAD ≤ VIN < VSSAD + 100mV
-300
200
nA
leakage current
maximum
VSSAD + 100mV ≤ VIN ≤ VCCAD - 200mV
-200
200
nA
VCCAD - 200mV < VIN ≤ VCCAD
-200
500
nA
IAIL
Analog off-state input
VCCAD = 5.5V
VSSAD ≤ VIN < VSSAD + 300mV
-1000
250
nA
leakage current
maximum
VSSAD + 300mV ≤ VIN ≤ VCCAD - 300mV
-250
250
nA
VCCAD - 300mV < VIN ≤ VCCAD
-250
1000
nA
IAOSB1
(1)
ADC1 Analog on-state input
VCCAD = 3.6V
VSSAD ≤ VIN < VSSAD + 100mV
-8
2
A
bias current
maximum
VSSAD + 100mV < VIN < VCCAD - 200mV
-4
2
A
VCCAD - 200mV < VIN < VCCAD
-4
12
A
IAOSB2
(1)
ADC2 Analog on-state input
VCCAD = 3.6V
VSSAD ≤ VIN < VSSAD + 100mV
-7
2
A
bias current
maximum
VSSAD + 100mV ≤ VIN ≤ VCCAD - 200mV
-4
2
A
VCCAD - 200mV < VIN ≤ VCCAD
-4
10
A
IAOSB1
(1)
ADC1 Analog on-state input
VCCAD = 5.5V
VSSAD ≤ VIN < VSSAD + 300mV
-10
3
A
bias current
maximum
VSSAD + 300mV ≤ VIN ≤ VCCAD - 300mV
-5
3
A
VCCAD - 300mV < VIN ≤ VCCAD
-5
14
A
IAOSB2
(1)
ADC2 Analog on-state input
VCCAD = 5.5V
VSSAD ≤ VIN < VSSAD + 300mV
-8
3
A
bias current
maximum
VSSAD + 300mV ≤ VIN ≤ VCCAD - 300mV
-5
3
A
VCCAD - 300mV < VIN ≤ VCCAD
-5
12
A
IADREFHI
ADREFHI input current
ADREFHI = VCCAD, ADREFLO = VSSAD
3
mA
ICCAD
Static supply current
Normal operating mode
15
mA
ADC core in power down mode
5
A
(1)
If a shared channel is being converted by both ADC converters at the same time, the on-state leakage is equal to IAOSL1 + IAOSL2
Copyright 2012–2013, Texas Instruments Incorporated
Peripheral Information and Electrical Specifications
127
Product Folder Links: RM48L950 RM48L750 RM48L550
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