參數(shù)資料
型號(hào): XR17V254IV-0A-EVB
廠商: Exar Corporation
文件頁(yè)數(shù): 45/70頁(yè)
文件大?。?/td> 0K
描述: EVAL BOARD FOR XR17V254 144LQFP
標(biāo)準(zhǔn)包裝: 1
系列: *
XR17V254
5
REV. 1.0.1
66MHZ PCI BUS QUAD UART WITH POWER MANAGEMENT SUPPORT
RI3#
59
I
UART channel 3 Ring Indicator or general purpose input (active LOW).
ANCILLARY SIGNALS
MPIO0
108
I/O
Multi-purpose input/output 0. The function of this pin is defined thru the Con-
figuration Register MPIOSEL, MPIOLVL, MPIOINV, MPIO3T and MPIOINT
MPIO1
107
I/O
Multi-purpose input/output 1. The function of this pin is defined thru the Con-
figuration Register MPIOSEL, MPIOLVL, MPIOINV, MPIO3T and MPIOINT.
MPIO2
74
I/O
Multi-purpose input/output 2. The function of this pin is defined thru the Con-
figuration Register MPIOSEL, MPIOLVL, MPIOINV, MPIO3T and MPIOINT.
MPIO3
73
I/O
Multi-purpose input/output 3. The function of this pin is defined thru the Con-
figuration Register MPIOSEL, MPIOLVL, MPIOINV, MPIO3T and MPIOINT.
MPIO4
68
I/O
Multi-purpose input/output 4. The function of this pin is defined thru the Con-
figuration Register MPIOSEL, MPIOLVL, MPIOINV, MPIO3T and MPIOINT.
MPIO5
67
I/O
Multi-purpose input/output 5. The function of this pin is defined thru the Con-
figuration Register MPIOSEL, MPIOLVL, MPIOINV, MPIO3T and MPIOINT.
MPIO6
66
I/O
Multi-purpose input/output 6. The function of this pin is defined thru the Con-
figuration Register MPIOSEL, MPIOLVL, MPIOINV, MPIO3T and MPIOINT.
MPIO7
65
I/O
Multi-purpose input/output 7. The function of this pin is defined thru the Con-
figuration Register MPIOSEL, MPIOLVL, MPIOINV, MPIO3T and MPIOINT.
EECK
116
O
Serial clock to EEPROM. An internal clock of CLK divide by 256 is used for
reading the vendor and sub-vendor ID during power up or reset. However, it
can be manually clocked thru the Configuration Register REGB.
EECS
115
O
Chip select to a EEPROM device like 93C46. It is manually selectable thru
the Configuration Register REGB. Requires a pull-up 4.7K ohm resistor for
external sensing of EEPROM during power up. See DAN112 for further
details.
EEDI
114
O
Write data to EEPROM device. It is manually accessible thru the Configura-
tion Register REGB.
EEDO
113
I
Read data from EEPROM device. It is manually accessible thru the Configu-
ration Register REGB.
XTAL1
110
I
Crystal or external clock input.
XTAL2
109
O
Crystal or buffered clock output.
TMRCK
69
I
16-bit timer/counter external clock input.
ENIR
70
I
Infrared mode enable (active high). This pin is sampled during power up, fol-
lowing a hardware reset (RST#) or soft-reset (register RESET). It can be
used to start up all 4 UARTs in the infrared mode. The sampled logic state is
transferred to MCR bit [6] in the UART.
VCC
64, 90,112, 4,
19, 34, 45, 137
Power supply for the UART core logic and PCI bus I/O - 3.3V only. The V254
is PCI 3.0 signalling compliant at 3.3V operation. The non-PCI inputs (except
XTAL1) are 5V tolerant. This includes all the serial (modem) inputs.
PIN DESCRIPTIONS
NAME
PIN #TYPE
DESCRIPTION
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