- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄375002 > XC9536XL (Xilinx, Inc.) FastFLASH High-Performance CPLD(FastFLASH 高性能復(fù)雜可編程邏輯器件) PDF資料下載
參數(shù)資料
| 型號(hào)： | XC9536XL |
| 廠商： | Xilinx, Inc. |
| 英文描述： | FastFLASH High-Performance CPLD(FastFLASH 高性能復(fù)雜可編程邏輯器件) |
| 中文描述： | FastFLASH高性能的CPLD（FastFLASH高性能復(fù)雜可編程邏輯器件） |
| 文件頁(yè)數(shù)： | 2/16頁(yè) |
| 文件大?。?/td> | 143K |
| 代理商： | XC9536XL |
第1頁(yè)當(dāng)前第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)
R
FastFLASH XC9500XL High-Performance CPLD Family
5-6
June 7, 1999 (Version 1.5)
Figure 1: XC9500XL Architecture
Note: Function block outputs (indicated by the bold lines) drive the I/O blocks directly.
Family Overview
The FastFLASH XC9500XL family is a 3.3V CPLD family
targeted for high-performance, low-voltage applications in
leading-edge communications and computing systems,
where high device reliability and low power dissipation is
important. Each XC9500XL device supports in-system pro-
gramming (ISP) and the full IEEE 1149.1 (JTAG) bound-
ary-scan, allowing superior debug and design iteration
capability for small form-factor packages. The XC9500XL
family is designed to work closely with the Xilinx Virtex,
Spartan-XL and XC4000XL FPGA families, allowing sys-
tem designers to partition logic optimally between fast inter-
face circuitry and high-density general purpose logic. As
shown in
Table 1
, logic density of the XC9500XL devices
ranges from 800 to 6400 usable gates with 36 to 288 regis-
ters, respectively. Multiple package options and associated
I/O capacity are shown in
Table 2
. The XC9500XL family
members are fully pin-compatible, allowing easy design
migration across multiple density options in a given pack-
age footprint.
The XC9500XL architectural features address the require-
ments of in-system programmability. Enhanced pin-locking
capability avoids costly board rework. In-system program-
ming throughout the full commercial operating range and a
high programming endurance rating provide worry-free
reconfigurations of system field upgrades. Extended data
retention supports longer and more reliable system operat-
ing life.
Advanced system features include output slew rate control
and user-programmable ground pins to help reduce system
noise. Each user pin is compatible with 5V, 3.3V, and 2.5V
inputs, and the outputs may be configured for 3.3V or 2.5V
operation. The XC9500XL device exhibits symmetric full
3.3V output voltage swing to allow balanced rise and fall
times.
In-System Programming Controller
JTAG
Controller
I/O
Blocks
Function
Block 1
Macrocells
1 to 18
Macrocells
1 to 18
Macrocells
1 to 18
Macrocells
1 to 18
JTAG Port
3
54
I/O/GTS
I/O/GSR
I/O/GCK
I/O
I/O
I/O
I/O
2 or 4
1
I/O
I/O
I/O
I/O
3
X5877_01
Function
Block 2
54
Function
Block 3
54
18
18
18
18
Function
Block N
54
F
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| XC9536XV-7VQ44C | High-performance CPLD |
| XC9536XV-7VQ44I | High-performance CPLD |
| XC9536-10VQ44C | XC9536 In-System Programmable CPLD |
| XC9536XL-10VQ44C | T1/E1 Transformer |
| XC9536-10VQ44I | XC9536 In-System Programmable CPLD |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XC9536XL-10CS48C | 功能描述:IC CPLD 36 MCELL C-TEMP 48-CSP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - CPLD（復(fù)雜可編程邏輯器件） 系列:XC9500XL 標(biāo)準(zhǔn)包裝:24 系列:CoolRunner II 可編程類型:系統(tǒng)內(nèi)可編程 最大延遲時(shí)間 tpd(1):7.1ns 電壓電源 - 內(nèi)部:1.7 V ~ 1.9 V 邏輯元件/邏輯塊數(shù)目:24 宏單元數(shù):384 門數(shù):9000 輸入/輸出數(shù):173 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:208-BFQFP 供應(yīng)商設(shè)備封裝:208-PQFP（28x28） 包裝:托盤 |
| XC9536XL-10CS48C0962 | 制造商:Xilinx 功能描述:XLXXC9536XL-10CS48C0962 IC SYSTEM GATE |
| XC9536XL-10CS48I | 功能描述:IC CPLD 36 MCELL I-TEMP 48-CSP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - CPLD（復(fù)雜可編程邏輯器件） 系列:XC9500XL 標(biāo)準(zhǔn)包裝:24 系列:CoolRunner II 可編程類型:系統(tǒng)內(nèi)可編程 最大延遲時(shí)間 tpd(1):7.1ns 電壓電源 - 內(nèi)部:1.7 V ~ 1.9 V 邏輯元件/邏輯塊數(shù)目:24 宏單元數(shù):384 門數(shù):9000 輸入/輸出數(shù):173 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:208-BFQFP 供應(yīng)商設(shè)備封裝:208-PQFP（28x28） 包裝:托盤 |
| XC9536XL-10CSG48C | 功能描述:IC CPLD 36MCELL 10NS 48-CSBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - CPLD（復(fù)雜可編程邏輯器件） 系列:XC9500XL 標(biāo)準(zhǔn)包裝:24 系列:CoolRunner II 可編程類型:系統(tǒng)內(nèi)可編程 最大延遲時(shí)間 tpd(1):7.1ns 電壓電源 - 內(nèi)部:1.7 V ~ 1.9 V 邏輯元件/邏輯塊數(shù)目:24 宏單元數(shù):384 門數(shù):9000 輸入/輸出數(shù):173 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:208-BFQFP 供應(yīng)商設(shè)備封裝:208-PQFP（28x28） 包裝:托盤 |
| XC9536XL-10CSG48I | 功能描述:IC CPLD 36MCELL 10NS 48-CSBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - CPLD（復(fù)雜可編程邏輯器件） 系列:XC9500XL 標(biāo)準(zhǔn)包裝:24 系列:CoolRunner II 可編程類型:系統(tǒng)內(nèi)可編程 最大延遲時(shí)間 tpd(1):7.1ns 電壓電源 - 內(nèi)部:1.7 V ~ 1.9 V 邏輯元件/邏輯塊數(shù)目:24 宏單元數(shù):384 門數(shù):9000 輸入/輸出數(shù):173 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:208-BFQFP 供應(yīng)商設(shè)備封裝:208-PQFP（28x28） 包裝:托盤 |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。