Spartan-3 FPGA Family: DC and Switching Characteristics
DS099 (v3.1) June 27, 2013
Product Specification
62
Table 34: Quiescent Supply Current Characteristics
Symbol
Description
Device
Commercial
Industrial
Units
ICCINTQ
Quiescent VCCINT supply current
XC3S50
5
24
31
mA
XC3S200
10
54
80
mA
XC3S400
15
110
157
mA
XC3S1000
35
160
262
mA
XC3S1500
45
260
332
mA
XC3S2000
60
360
470
mA
XC3S4000
100
450
810
mA
XC3S5000
120
600
870
mA
ICCOQ
Quiescent VCCO supply current
XC3S50
1.5
2.0
2.5
mA
XC3S200
1.5
3.0
3.5
mA
XC3S400
1.5
3.0
3.5
mA
XC3S1000
2.0
4.0
5.0
mA
XC3S1500
2.5
4.0
5.0
mA
XC3S2000
3.0
5.0
6.0
mA
XC3S4000
3.5
5.0
6.0
mA
XC3S5000
3.5
5.0
6.0
mA
ICCAUXQ
Quiescent VCCAUX supply current
XC3S50
7
20
22
mA
XC3S200
10
30
33
mA
XC3S400
15
40
44
mA
XC3S1000
20
50
55
mA
XC3S1500
35
75
85
mA
XC3S2000
45
90
100
mA
XC3S4000
55
110
125
mA
XC3S5000
70
130
145
mA
Notes:
1.
The numbers in this table are based on the conditions set forth in
Table 32. Quiescent supply current is measured with all I/O drivers in a
high-impedance state and with all pull-up/pull-down resistors at the I/O pads disabled. Typical values are characterized using devices with
typical processing at room temperature (TJ of 25°C at VCCINT = 1.2V, VCCO = 3.3V, and VCCAUX = 2.5V). Maximum values are the
production test limits measured for each device at the maximum specified junction temperature and at maximum voltage limits with
VCCINT = 1.26V, VCCO = 3.465V, and VCCAUX = 2.625V. The FPGA is programmed with a "blank" configuration data file (i.e., a design with
no functional elements instantiated). For conditions other than those described above, (e.g., a design including functional elements, the use
of DCI standards, etc.), measured quiescent current levels may be different than the values in the table. Use the XPower Estimator or
XPower Analyzer for more accurate estimates. See Note 2.
2.
There are two recommended ways to estimate the total power consumption (quiescent plus dynamic) for a specific design: a) The
Spartan-3XPower Estimator provides quick, approximate, typical estimates, and does not require a netlist of the design. b) XPower Analyzer, part of
the Xilinx ISE development software, uses the FPGA netlist as input to provide more accurate maximum and typical estimates.
3.
The maximum numbers in this table also indicate the minimum current each power rail requires in order for the FPGA to power-on
successfully, once all three rails are supplied. If VCCINT is applied before VCCAUX, there may be temporary additional ICCINT current until