參數(shù)資料
型號： XA-H3
廠商： NXP Semiconductors N.V.
英文描述： CMOS 16-bit highly integrated microcontroller
中文描述： 的CMOS 16位高度集成的微控制器
文件頁數(shù)： 16/36頁
文件大?。?/td> 183K
代理商： XA-H3
Philips Semiconductors
Preliminary specification
XA-H3
CMOS 16-bit highly integrated microcontroller
1999 Sep 24
16
MMR Name
Reset
Value
Description
Address
Offset
Size
Read/Write or
Read Only
Data FIFO Register Ch.0 Tx
R/W
16
14Eh
14E = Byte2 = older
14F = Byte3 = younger
Control Register
0000h
DMA Control Register Ch.1 Tx
R/W
8
150h
00h
FIFO Control & Status Register Ch.1 Tx
R/W
8
151h
Control & Status Register
00h
Segment Register Ch.1 Tx
R/W
8
152h
Points to 64 k data segment
00h
Buffer Base Register Ch.1 Tx
R/W
8
154h
Wrap Reload Value for A15 – A8, A7 – A0
reloaded to zero by hardware
Upper Bound (plus 1) on A15 – A0
00h
Buffer Bound Register Ch.1 Tx
R/W
16
156h
0000h
Address Pointer Reg Ch.1 Tx
R/W
16
158h
Current Address pointer A15 – A0
0000h
Byte Count Register Ch.1 Tx
R/W
16
15Ah
Corresponds to A15 – A0 Byte Count, generates
interrupt if enabled and byte count exceeded.
Byte0 & 1
0000h
Data FIFO Register Ch.1 Lo Tx
R/W
16
15Ch
0000h
Data FIFO Register Ch.1 Hi Tx
R/W
16
15Eh
Byte2 & 3
0000h
DMA Control Register Ch.2 Tx
R/W
8
160h
Control Register
00h
FIFO Control & Status Register Ch.2 Tx
R/W
8
161h
Control & Status Register
00h
Segment Register Ch.2 Tx
R/W
8
162h
Points to 64 k data segment
00h
Buffer Base Register Ch.2 Tx
R/W
8
164h
Wrap Reload Value for A15 – A8, A7 – A0
reloaded to zero by hardware
Upper Bound (plus 1) on A15 – A0
00h
Buffer Bound Register Ch.2 Tx
R/W
16
166h
0000h
Address Pointer Reg Ch.2 Tx
R/W
16
168h
Current Address pointer A15 – A0
0000h
Byte Count Register Ch.2 Tx
R/W
16
16Ah
Corresponds to A15 – A0 Byte Count, generates
interrupt if enabled and byte count exceeded.
Byte0 & 1
0000h
Data FIFO Register Ch.2 Lo Tx
R/W
16
16Ch
0000h
Data FIFO Register Ch.2 Hi Tx
R/W
16
16Eh
Byte2 & 3
0000h
DMA Control Register Ch.3 Tx
R/W
8
170h
Control Register
00h
FIFO Control & Status Register Ch.3 Tx
R/W
8
171h
Control & Status Register
00h
Segment Register Ch. 3 Tx
R/W
8
172h
Points to 64 k data segment
00h
Buffer Base Register Ch. 3 Tx
R/W
8
174h
Wrap Reload Value for A15 – A8,
A7 – A0 reloaded to zero by hardware
Upper Bound (plus 1) on A15 – A0
00h
Buffer Bound Register Ch.3 Tx
R/W
16
176h
0000h
Address Pointer Reg Ch.3 Tx
R/W
16
178h
Current Address pointer A15 – A0
0000h
Byte Count Register Ch.3 Tx
R/W
16
17Ah
Corresponds to A15 – A0 Byte Count, generates
interrupt if enabled and byte count exceeded.
Byte0 & 1
0000h
Data FIFO Register Ch.3Lo Tx
R/W
16
17Ch
0000h
Data FIFO Register Ch.3 Hi Tx
R/W
16
17Eh
Byte2 & 3
0000h
R/W
180-1FEh
RESERVED for future DMA
–
Miscellaneous DMA Registers
Rx Character Time Out Register Ch.0
R/W
8
200h
0 value disables counter interrupt.
00h
Rx Character Time Out Register Ch.1
R/W
8
202h
Same as above, for Rx1
00h
Rx Character Time Out Register Ch.2
R/W
8
204h
Same as above, for Rx2
00h
Rx Character Time Out Register Ch.3
R/W
8
206h
Same as above, for Rx3
00h
Global DMA Interrupt Register
R/W
16
210h
DMA Interrupt Flags
0000h
GPOut
R/W
8
260h
GPOut[7] drives pin 98 (GPOut) through an
inverter.
GPOut[6-0] are unused, and must be written
with zeroes.
8xh
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