Philips Semiconductors
Preliminary specification
XA-H3
CMOS 16-bit highly integrated microcontroller
1999 Sep 24
15
MMR Name
Reset
Value
Description
Address
Offset
Size
Read/Write or
Read Only
Buffer Base Register Ch. 1 Rx
R/W
8
114h
Wrap Reload Value for A15 – A8, A7 – A0
reloaded to zero by hardware
Upper Bound (plus 1) on A15 – A0
00h
Buffer Bound Register Ch.1 Rx
R/W
16
116h
0000h
Address Pointer Reg Ch.1 Rx
R/W
16
118h
Current Address pointer A15 – A0
0000h
Byte Count Register Ch.1 Rx
R/W
16
11Ah
Corresponds to A15 – A0 Byte Count, generates
interrupt if enabled and byte count exceeded.
11Ch = Byte 0 = older,
11Dh = Byte 1 = younger
11Eh = Byte 2 = older,
11Fh = Byte 3 = younger
Control Register
0000h
Data FIFO Register Ch.1 Lo Rx
R/W
16
11Ch
00h
00h
00h
00h
00h
Data FIFO Register Ch.1 Hi Rx
R/W
16
11Eh
DMA Control Register Ch.2 Rx
R/W
8
120h
FIFO Control & Status Register Ch.2 Rx
R/W
8
121h
Control & Status Register
00h
Segment Register Ch. 2 Rx
R/W
8
122h
Points to 64 k data segment
00h
Buffer Base Register Ch. 2 Rx
R/W
8
124h
Wrap Reload Value for A15 – A8, A7 – A0
reloaded to zero by hardware
Upper Bound (plus 1) on A15 – A0
00h
Buffer Bound Register Ch.2 Rx
R/W
16
126h
0000h
Address Pointer Reg Ch.2 Rx
R/W
16
128h
Current Address pointer A15 – A0
0000h
Byte Count Register Ch.2 Rx
R/W
16
12Ah
Corresponds to A15 – A0 Byte Count, generates
interrupt if enabled and byte count exceeded.
12Ch = Byte 0 = older,
12Dh = Byte 1 = younger
12Eh = Byte 2 = older,
12Fh = Byte 3 = younger
Control Register
0000h
Data FIFO Register Ch.2 Lo Rx
R/W
16
12Ch
00h
00h
00h
00h
00h
Data FIFO Register Ch.2 Hi Rx
R/W
16
12Eh
DMA Control Register Ch.3 Rx
R/W
8
130h
FIFO Control & Status Register Ch.3 Rx
R/W
8
131h
Control & Status Register
00h
Segment Register Ch. 3 Rx
R/W
8
132h
Points to 64 k data segment
00h
Buffer Base Register Ch. 3 Rx
R/W
8
134h
Wrap Reload Value for A15 – A8, A7 – A0
reloaded to zero by hardware
Upper Bound (plus 1) on A15 – A0
00h
Buffer Bound Register Ch.3 Rx
R/W
16
136h
0000h
Address Pointer Reg Ch.3 Rx
R/W
16
138h
Current Address pointer A15 – A0
0000h
Byte Count Register Ch.3 Rx
R/W
16
13Ah
Corresponds to A15 – A0 Byte Count, generates
interrupt if enabled and byte count exceeded.
13Ch = Byte 0 = older,
13Dh = Byte 1 = younger
13Eh = Byte 2 = older,
13Fh = Byte 3 = younger
0000h
Data FIFO Register Ch.3 Lo Rx
R/W
16
13Ch
00h
00h
00h
00h
Data FIFO Register Ch.3 Hi Rx
R/W
16
13Eh
Tx DMA Registers
DMA Control Register Ch.0 Tx
R/W
8
140h
Control Register
00h
FIFO Control & Status Register Ch.0 Tx
R/W
8
141h
Control & Status Register
00h
Segment Register Ch. 0 Tx
R/W
8
142h
Points to 64 k data segment
00h
Buffer Base Register Ch. 0 Tx
R/W
8
144h
Wrap Reload Value for A15 – A8, A7 – A0
reloaded to zero by hardware
Upper Bound (plus 1) on A15 – A0
00h
Buffer Bound Register Ch.0 Tx
R/W
16
146h
0000h
Address Pointer Reg Ch.0 Tx
R/W
16
148h
Current Address pointer A15 – A0
0000h
Byte Count Register Ch.0 Tx
R/W
16
14Ah
Corresponds to A15 – A0 Byte Count, generates
interrupt if enabled and byte count exceeded.
14C = Byte0 = older
14D = Byte 1 = younger
0000h
Data FIFO Register Ch.0 Tx
R/W
16
14Ch
0000h