參數(shù)資料
型號(hào): X3100V28Z
廠商: INTERSIL CORP
元件分類: 電源管理
英文描述: 4-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO28
封裝: ROHS COMPLIANT, PLASTIC, MO-153AE, TSSOP-28
文件頁(yè)數(shù): 3/41頁(yè)
文件大?。?/td> 561K
代理商: X3100V28Z
11
FN8110.1
January 3, 2008
Figure 2. Writing to Configuration Register
CONTROL REGISTER
The Control Register is realized as two bytes of vola-
tile RAM (Table 10, Table 11). This register is written
using the WCNTR instruction, see Table 30 and section
Table 10. Control Register—Upper Byte
Table 11. Control Register—Lower Byte
Since the control register is volatile, data will be lost
following a power-down and power-up sequence.
The default value of the control register on initial
power-up or when exiting the SLEEP MODE is 00h
(for both upper and lower bytes respectively). The
functions that can be manipulated by the Control
Register are shown in Table 12.
Table 12. Control Register Functionality
Sleep Control (SLP)
Setting the SLP bit to ‘1’ forces the X3100 or X3101
into the sleep mode, if VCC < VSLP. See section “Sleep
Table 13. Sleep Mode Selection
15
14
13
12
11
10
9
8
CBC4 CBC3 CBC2 CBC1 UVPC OVPC CSG1 CSG0
7
6
54
321
0
SLP
0
x
xx
Configuration Register
(SRAM = old value)
Write
Enable
Write to
4kbit EEPROM
Power-down
Power-up
Store
(New Value)
in Shadow
EEPROM
Configuration Register
(SRAM = Old Value)
WCFIG (New Value)
Data Recalled
NO
YES
WREN
EEWRITE
Configuration Register
(SRAM = New Value)
Power-up
Configuration Register
(Sram = New Value)
from Shadow
EEPROM to SRAM
Data Recalled
from Shadow
EEPROM to SRAM
Data Recalled
from Shadow
EEPROM to SRAM
Power-down-
power-on
Bit(s) Name
Function
0-4
(don’t care)
5,6
0, 0
Reserved—write 0 to these locations.
7
SLP
Select sleep mode.
8,9
CSG1,
CSG0
Select current sense voltage gain
10
OVPC OVP control: switch pin OVP = VCC/VSS
11
UVPC UVP control: switch pin UVP = VCC/VSS
12
CBC1 CB1 control: switch pin CB1 = VCC/VSS
13
CBC2 CB2 control: switch pin CB2 = VCC/VSS
14
CBC3 CB3 control: switch pin CB3 = VCC/VSS
15
CBC4 CB4 control: switch pin CB4 = VCC/VSS
Control Register Bits
Operation
SLP
0
Normal operation mode
1
Device enters Sleep mode
X3100, X3101
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