參數(shù)資料
型號(hào)： X3100V28Z
廠商： INTERSIL CORP
元件分類(lèi)： 電源管理
英文描述： 4-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO28
封裝： ROHS COMPLIANT, PLASTIC, MO-153AE, TSSOP-28
文件頁(yè)數(shù)： 14/41頁(yè)
文件大?。?/td> 561K
代理商： X3100V28Z
21
FN8110.1
January 3, 2008
MONITOR MODE
Analog Multiplexer Selection
The X3100 and X3101 can be used to externally monitor
individual battery cell voltages, and battery current. Each
quantity can be monitored at the analog output pin (AO),
and is selected using the analog select (AS0 - AS2) pins
Current Monitor Function
The voltages monitored at pins VCS1 and VCS2 can be
used to calculate current flowing through the battery
terminals, using an off-board microcontroller with an A/D.
Since the value of the sense resistor (RSENSE) is small
(typically in the order of tens of m
Ω), and since the
resolution of various A/D converters may vary, the
voltage across RSENSE (VCS1 and VCS2) is amplified
internally with a gain of between 10 and 160, and out-
put to pin AO (Figure 7).
Figure 7. X3100/X3101 Monitor Circuit
[3]
— The device detects the load resistance has risen above ROCR.
— Voltages P+ and VCS21 return to their normal levels.
— The test current from pin OVP/LMON is stopped (ILMON = 0A)
— The device has now returned from the load monitor state
— The internal over-current release time timer begins counting down.
— Device is still in over-current protection mode.
(3,4)
The internal over-current release timer continues counting for TOCR seconds.
[4]
— The internal over-current release timer times out, and VCS21 is still below VOC.
— The device returns from over-current protection mode, and is now in normal operation mode.
— The discharge FET is automatically switched ON (UVP/OCP = Vss)—unless the status of UVPC has been
changed in the control register during the over-current protection mode.
— The status of the charge FET remains unaffected.
— Discharge of the battery cells is once again possible.
Table 24. Over-Current Protection Mode—Event Diagram Description (Continued)
Event
Event Description
Table 25. AO Selection Map
AS2 AS1 AS0
AO output
LL
L
VSS(1)
LL
H
VCELL1 - VCELL2 (VCELL12)
LH
L
VCELL2 - VCELL3 (VCELL23)
LH
H
VCELL3 - VCELL4 (VCELL34)
HL
L
VCELL4 - Vss (VCELL4)
HL
H
VCS1 - VCS2 (VCS12)(2)
HH
L
VCS2 - VCS1 (VCS21)(2)
HH
H
VSS
Notes: (1) This is the normal state of the X3100 or X3101. While
in this state Over-charge and Over-discharge Protec-
tion conditions are periodically monitored (See “Peri-
(2) VCS1, VCS2 are read at AO with respect to a DC bias
Over-Current
Protection
VCS1
VCS2
+
-
CSG1 CSG0
Config
Register
A
na
log
MUX
AS0
AS1
AS2
AO
SPI
I/F
S0
SCL
CS
SI
RSENSE
Gain
Setting
Cross-Bar
Switch
X3100/X3101
OP1
Voltage
Level
Shifters
Cell 1 Voltage
Cell 2 Voltage
Cell 3 Voltage
Cell 4 Voltage
2.5V
P-
R2
R1
X3100, X3101
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