參數(shù)資料
型號(hào)： X1209
英文描述： Real Time Clock/Calendar with Event/Timestamp Detection & Alarms(帶有事件/時(shí)間標(biāo)記檢測(cè)與報(bào)警功能的實(shí)時(shí)時(shí)鐘/日歷)
中文描述： 實(shí)時(shí)時(shí)鐘/日歷的事件/時(shí)間戳檢測(cè)
文件頁(yè)數(shù)： 17/27頁(yè)
文件大小： 511K
代理商： X1209
17 of 27
REV 3.0 2/11/04
www.xicor.com
Preliminary Information
X1209
EVIENB: Event Current Source Enable Bit - Volatile
This bit enables / disables the internal pullup current
source used for the EVIN pin. When the EVIENB bit is
set to “1”, the pullup current source is always disabled.
When the EVIENB bit is cleared to “0”, the pullup cur-
rent source is enabled (current source is approximately
1 μA).
ANALOG TRIMMING REGISTER (ATR)
ATR<5:0>: Analog Trimming Register - Volatile
The X1209 contains two digitally controlled capacitors
connected from both X1 pin and X2 pin to the ground
pin. The amount capacitance can be selected via the
ATR register.
Six analog trimming Bits from
ATR5
to
ATR0
are pro-
vided to adjust the on-chip loading capacitance range.
The on-chip load capacitance ranges from 4.5 pF to
20.25 pF. Each bit has a different weight for capaci-
tance adjustment. In addition, using a Citizen CFS-206
crystal with different ATR bit combinations provides an
estimated ppm range from +125 ppm to –34 ppm to the
nominal frequency compensation. The combination of
digital and analog trimming can give up to +185 to –94
ppm adjustment.
The on-chip capacitance can be calculated as follows:
C
ATR
= [(ATR value, decimal) x 0.5pF] + 9.0pF
Note that the ATR values are in two’s complement, for
example, ATR(000000) = 25pF, ATR(100000) = 9pF,
and ATR(011111) = 40.5pF.
The entire range runs from
4.5pF to 20.25pF in 0.5pF steps.
The effective load capacitance is the parallel combina-
tion of the two capacitances at each pin. The values
calculated above are typical, and total load capaci-
tance seen by the crystal will include approximately
2pF of package and board capacitance in addition to
the ATR value.
BMATR<1:0>: Battery Mode ATR Selection - Volatile
Since accuracy of the crystal oscillator is dependent on
the Vcc/Vbat operation, the X1209 provides the capa-
bility to adjust the capacitance when the devices
switches between power sources.
DIGITAL TRIMMING REGISTER (DTR)
DTR<2:0>: Digital Trimming Register - Volatile
The digital trimming Bits
DTR2
,
DTR1
and
DTR0
adjust the number of counts per second and average
the ppm error to achieve better accuracy.
DTR2 is a sign bit. DTR2=0 means frequency compen-
sation is > 0. DTR2=1 means frequency compensation
is < 0.
DTR1 and DTR0 are scale bits. DTR1 gives ____ ppm
adjustment and DTR0 gives ____ ppm adjustment.
A range from -60 ppm to +60 ppm can be represented
by using three bits above.
BMATR1
0
0
1
1
BMATR0
0
1
0
1
Delta Capacitance
(Cbat to Cvcc)
0 pF
- 0.5 pF (~ + 2ppm)
+ 0.5 pF (~ -2ppm)
+ 1 pF (~ -4ppm)
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