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參數(shù)資料
| 型號： | WM8773 |
| 廠商： | Wolfson Microelectronics |
| 元件分類： | ADC |
| 英文描述： | 24-bit, 96kHz ADC with 8 Channel I/P Multiplexer |
| 中文描述： | 24位，96kHz的ADC，具有8通道I /頁復(fù)用器 |
| 文件頁數(shù)： | 17/30頁 |
| 文件大?。?/td> | 270K |
| 代理商： | WM8773 |
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Product Preview
WM8773
PP Rev 1.0 June 2002
17
DSP LATE MODE
The MSB of the left channel ADC data is output on DOUT and changes on the same falling edge of
BCLK as the low to high ADCLRC transition and may be sampled on the rising edge of BCLK. The
right channel ADC data is contiguous with the left channel data (Figure 13).
ADCLRC
BCK
DOUT
Word Length (WL)
1/fs
LEFT CHANNEL
n
2
1
n-1
LSB
MSB
n
2
1
n-1
RIGHT CHANNEL
NO VALID DATA
1
Figure 13 DSP Late Mode Timing Diagram
–
ADC Data Output
CONTROL INTERFACE OPERATION
The WM8773 is controlled using a 3-wire SPI compatible serial configuration.
The control interface is 5V tolerant, meaning that the control interface input signals CE, CL and DI
may have an input high level of 5V while DVDD is 3V. Input thresholds are determined by DVDD.
RESETB is also 5V tolerant.
3-WIRE (SPI COMPATIBLE) SERIAL CONTROL MODE
DI is used for the program data, CL is used to clock in the program data and CE is used to latch the
program data. DI is sampled on the rising edge of CL. The 3-wire interface protocol is shown in
Figure 14.
Figure 14 3-wire SPI compatible Interface
Note:
1.
B[15:9] are Control Address Bits
2.
B[8:0] are Control Data Bits
3.
CE is edge sensitive
–
the data is latched on the rising edge of CE.
B15 B14 B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0
CE
CL
DI
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相關(guān)代理商/技術(shù)參數(shù) |
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| WM8774 | 制造商:WOLFSON 制造商全稱:WOLFSON 功能描述:24 - bit, 192kHz 8 - Channel Input Stereo Codec |
| WM8774IFT | 制造商:WOLFSON 制造商全稱:WOLFSON 功能描述:24 - bit, 192kHz 8 - Channel Input Stereo Codec |
| WM8774IFV | 制造商:WOLFSON 制造商全稱:WOLFSON 功能描述:24 - bit, 192kHz 8 - Channel Input Stereo Codec |
| WM8775 | 制造商:WOLFSON 制造商全稱:WOLFSON 功能描述:24-bit, 96kHz ADC with 4 Channel I/P Multiplexer |
| WM8775_06 | 制造商:WOLFSON 制造商全稱:WOLFSON 功能描述:24-bit, 96kHz ADC with 4 Channel I/P Multiplexer |
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