參數(shù)資料
型號(hào): W986432DH-7L
廠商: WINBOND ELECTRONICS CORP
元件分類(lèi): DRAM
英文描述: 2M X 32 SYNCHRONOUS DRAM, 5.5 ns, PDSO86
封裝: 0.400 INCH, 0.50 MM PITCH, TSOP2-86
文件頁(yè)數(shù): 38/48頁(yè)
文件大?。?/td> 1648K
代理商: W986432DH-7L
W986432DH
Publication Release Date: July 30, 2002
- 43 -
Revision A5
Operating Timing Example, continued
Timing Chart of Burst Stop Cycle (Precharge Command)
In the case of Burst Lenght = 8
Note:
represents the Precharge command
PRCG
Read
PRCG
0
11
10
9
8
7
6
5
4
3
2
1
Q0
Q1
Q2
Q3
Q0
Q1
Q2
Q3
Read
PRCG
Q4
( a )CAS latency =2
( b )CAS latency = 3
DQ
(1) Read cycle
(2) Write cycle
Commad
Write
PRCG
D0
D1
D2
D3
D0
D1
D2
D3
Write
PRCG
D4
( b ) CAS latency = 3
DQ
( a ) CAS latency =2
DQM
DQ
tWR
Commad
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