參數(shù)資料
型號： W986432DH-7L
廠商： WINBOND ELECTRONICS CORP
元件分類： DRAM
英文描述： 2M X 32 SYNCHRONOUS DRAM, 5.5 ns, PDSO86
封裝： 0.400 INCH, 0.50 MM PITCH, TSOP2-86
文件頁數(shù)： 12/48頁
文件大?。?/td> 1648K
代理商： W986432DH-7L
W986432DH
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14. AC CHARACTERISTICS .................................................................................................................16
15. TIMING WAVEFORMS....................................................................................................................19
Command Input Timing ..................................................................................................................19
Timing Waveforms, continued
.................................................................................................................20
Read Timing ...................................................................................................................................20
Timing Waveforms, continued
.................................................................................................................21
Control Timing of Input Data...........................................................................................................21
Timing Waveforms, continued
.................................................................................................................22
Control Timing of Output Data ........................................................................................................22
Timing Waveforms, continued
.................................................................................................................23
Mode Register Set Cycle ................................................................................................................23
16. OPERATING TIMING EXAMPLE ....................................................................................................24
Interleaved Bank Read (Burst Length = 4, CAS Latency = 3) ........................................................24
Interleaved Bank Read (Burst Length = 4, CAS Latency = 3, Autoprecharge)...............................25
Interleaved Bank Read (Burst Length = 8, CAS Latency = 3) ........................................................26
Interleaved Bank Read (Burst Length = 8, CAS Latency = 3, Autoprecharge)...............................27
Interleaved Bank Write (Burst Length = 8) .....................................................................................28
Interleaved Bank Write (Burst Length = 8, Autoprecharge)............................................................29
Page Mode Read (Burst Length = 4, CAS Latency = 3) .................................................................30
Page Mode Read/Write (Burst Length = 8, CAS Latency = 3) .......................................................31
Autoprecharge Read (Burst Length = 4, CAS Latency = 3)............................................................32
Autoprecharge Write (Burst Length = 4).........................................................................................33
Autorefresh Cycle ...........................................................................................................................34
Self-refresh Cycle ...........................................................................................................................35
Bust Read and Single Write (Burst Length = 4, CAS Latency = 3).................................................36
Power-down Mode ..........................................................................................................................37
Auto-precharge Timing (Write Cycle) .............................................................................................38
Auto-precharge Timing (Read Cycle) .............................................................................................39
Timing Chart of Read to Write Cycle ..............................................................................................40
Timing Chart of Write to Read Cycle ..............................................................................................41
Timing Chart of Burst Stop Cycle (Burst Stop Command) .............................................................42
Timing Chart of Burst Stop Cycle (Precharge Command)..............................................................43
CKE/DQM Input Timing (Write Cycle) ............................................................................................44
CKE/DQM Input Timing (Read Cycle) ............................................................................................45
Self Refresh/Power Down Mode Exit Timing..................................................................................46
17. PACKAGE DIMENSION ..................................................................................................................47
86L TSOP (II)-400 mil.....................................................................................................................47
18. VERSION HISTORY ........................................................................................................................48
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