參數(shù)資料
型號: W947D6HBHX6E
廠商: WINBOND ELECTRONICS CORP
元件分類: DRAM
英文描述: 8M X 16 DDR DRAM, 5 ns, PBGA60
封裝: 8 X 9 MM, 0.80 MM PITCH, HALOGEN FREE AND LEAD FREE, VFBGA-60
文件頁數(shù): 32/60頁
文件大?。?/td> 1160K
代理商: W947D6HBHX6E
W947D6HB / W947D2HB
128Mb Mobile LPDDR
Publication Release Date:Jun,17, 2011
- 38 -
Revision A01-003
7.6.10 Interrupting Write to Read
Data for any Write burst may be truncated by a subsequent READ command as shown in the figure below. Note that
the only data-in pairs that are registered prior to the tWTR period are written to the internal array, and any subsequent
data-in must be masked with DM.
BA,Col n
BA,Col b
WRITE
NOP
CK
Command
Address
1) Dl b = Data in to column b. DO n=Data out from column n.
2) An interrupted burst of 4 is shown, 2 data elements are written.
3 subsequent elements of Data In are applied in the programmed order following DI b.
3) tWTR is referenced from the positive clock edge after the last Data In pair.
4)A10 is LOW with the WRITE command (Auto Precharge is disabled)
5) The READ and WRITE commands are to the same device but not necessarily to the same bank.
NOP
READ
= Don't Care
DQS
DQ
DM
tDQSSmax
BA,Col n
tWTR
CL=3
DI b
DO n
NOP
7.6.11 Write to Precharge
Data for any WRITE burst may be followed by a subsequent PRECHARGE command to the same bank (provided
Auto Precharge was not activated). To follow a WRITE without truncating the WRITE burst, tWR should be met as
shown in the figure below.
7.6.12 Non-Interrupting Write to Precharge
BA,Col n
BA,Col b
WRITE
NOP
PRE
CK
Command
Address
1) Dl b = Data in to column b
3 subsequent elements of Data In are applied in the programmed order following DI b.
2) A non-interrupted burst of 4 is shown.
3) tWR is referenced from the positive clock edge after the last Data In pair.
4) A10 is LOW with the WRITE command (Auto Precharge is disabled)
NOP
= Don't Care
DQS
DQ
DM
tDQSSmax
BA a (or all)
tWR
DI b
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